I have the 74hc597 parallel-in serial-out (PISO) shift register. The datasheet can be found here. I have a general idea about how serial-in shift registers (SIPO) work, but I'm having trouble understanding PISO and what a couple of pins do or how they work. I have a few (very basic) questions about this table in particular:
1) The shift register is clearly described as a 'parallel-in serial-out' (PISO) shift register, so why is there a 'serial data input' pin?
2) Which clock input (shift register or storage register) is used for controlling the serial output? I am guessing 'shift register clock input' is used because you are shifting out one bit at a time from the parallel data stored, right?
3) What is 'parallel load' input? Is this used for reading all the parallel inputs? Is it some type of latch pin, similar to SIPO shift registers?
Here is my summary of how I think PISO shift registers work, please tell me if it's wrong:
-When the 'parallel load input' is set to LOW, all the inputs enter the register
-Then when the 'storage register clock' pulses, the data is saved into the storage register.
-Then during each 'shift register clock' pulse, the bits are outputted one by one
Thanks for your help.