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I am designing a PCB with EAGLE and saw that it was trying to limit the amount of vias through the PCB.

  • Why do you want less vias?
  • Why are they bad?
  • Do they bring extra manufacturing cost or is it OK for low-frequency and low-power solutions?
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I think the main problem is: vias could occupy significant space from other components, thus a larger board is necessary.

enter image description here

On the first picture a TH vias allow us only four pads to be placed. But with a blind via or without a via we have place for six (or more if we have more rows) pads. A larger BGA component could be placed here this way. source

And at the end reduced size means reduced cost.


But to defend the vias a little:
There are cases when they are useful. For example at high power dissipation componenets thermal vias could be used to help dissipate the heat by leading it to large copper-pours.

enter image description here


All in all it is very application-specific and could have both advantages and disadvantages as well. It is up to you to find the balance.

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    \$\begingroup\$ Don't forget about via inductance and resistance. I haven't used Eagle in a long time, so I don't know its current "design rules", but if it applies them per signal also, a reason might be that making a small detour for high current or high frequency (or worse: both) is better than jumping through two vias, as the maths concerning numbers and proximity to others there is very complex in some cases. Since you put the remaining so well and clear, I'll leave it here as a small per-signal-note. \$\endgroup\$ – Asmyldof Jun 23 '15 at 9:39
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    \$\begingroup\$ Also, the plating thickness on vias is very thin, so it adds a lot of resistance and can't carry much current. In order to bring power from one side of a board to the other using a TH via, you would need several of them just to handle the current. This too would waste space. Also because of their inductance/resistance, they are not good for carrying high-frequency signals. Using vias can lead to signal integrity issues. Don't be afraid to use vias, but only use them when they're absolutely necessary. \$\endgroup\$ – DerStrom8 Jun 23 '15 at 13:18
  • \$\begingroup\$ @derstrom8 I am using it for approx 60Hz signals & 5V100mA I suppose vias will be allright for that? \$\endgroup\$ – rhbvkleef Jun 24 '15 at 8:26
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    \$\begingroup\$ @rhbvkleef Whenever I am thinking of using vias I use the online calculator: circuitcalculator.com/wordpress/2006/03/12/pcb-via-calculator . I enter the size of the vias I'm planning on using and it tells me how much current it can carry, its resistance, and a couple of other specs. I highly recommend it. I wouldn't be too worried about a 60Hz signal through a via, but I would still keep the resistance in mind. More vias on a signal = less resistance = better quality signal \$\endgroup\$ – DerStrom8 Jun 24 '15 at 12:05
  • \$\begingroup\$ Vias on a cheap board (low Tg) that will go through reflow have a propensity to break as the Z axis expansion can be as high as 300 ppm above Tg; the longer above Tg, the higher the chance of damage. See IPC4101 for typical Tg values for different standards. \$\endgroup\$ – Peter Smith Dec 29 '17 at 14:41
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I wouldn't say that vias are bad. They are not!

One useful way to use vias is to shield RF energy in a RF board, a technique called via stiching:

cross section of a PCB comparing a board with and without via stiching

top view of the same board

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  • \$\begingroup\$ I like that idea, not useful for my applications tho \$\endgroup\$ – rhbvkleef Jul 3 '15 at 11:43
  • \$\begingroup\$ Often time, however, the other vias are the SOURCE of the EMI, that the stitching vias are put in to thwart. \$\endgroup\$ – mike65535 Oct 12 '18 at 12:33
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It is just one of the parameters you can use to tweak the autorouter. Via's add a little cost in drilling (even though this might not be explicitly shown on the bill), they take up space, and other things being equal it is better for a route to stay on the same layer.

I can imagine (but I am not sure) that a via is just a little bit less reliable than a simple copper trace.

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  • \$\begingroup\$ In terms of reliability the issue is assembly, untented vias, especially vias leading to planes or fat traces tend to suck solder away from a pad causing QC issues during PCBA. Solder wicking is a major QC headache for BGA parts where visual inspection of joints is difficult. \$\endgroup\$ – crasic Jun 23 '15 at 18:45
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For High Speed Buses, vias will lead to impedance mismatch and cause reflections.

Vias also cannot tolerate high current. Multiple vias are needed for high current planes. This is obviously going to increase the spacing.

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  • \$\begingroup\$ That is why for high-speed buses and associated grounds many, many vias are used in a 'stitching' pattern to keep impedance and ESR as low as possible. They are a necessary evil on high-density SMD boards. Look at any computer motherboard. \$\endgroup\$ – Sparky256 Dec 30 '17 at 3:39

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