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Does anyone know of power-estimation spreadsheet or tool, or have measured power data for the Atmel AVR32 UC3L Series when running heavily in a real application?

The datasheet itself is not very helpful, as it lists mostly minimum power numbers in few light configurations (e.g. spinning Fibonacci numbers, which is just adds and branches, with every possible MCU feature disabled) with statements like "These numbers are valid for the measured condition only and must not be extrapolated to other frequencies." [AVR32UC3L datasheet, table 7-5, page 44].

EDIT: I thought the question was quite clear, but to be specific: I'm interested in measured power data or a power estimation spreadsheet for this particular microcontroller, not microcontroller power theory in general.

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    \$\begingroup\$ Have you tried asking Atmel? \$\endgroup\$ – Leon Heller Aug 2 '11 at 17:28
  • \$\begingroup\$ @Leon yes; if I get a meaningful response from them I'll post the info here. Honestly, I am most interested in data from real users. Vendors go out of their way to show how low power they can be. They are less talkative about the high end or even "typical" use. \$\endgroup\$ – wjl Aug 2 '11 at 20:07
  • \$\begingroup\$ @WJL, I have used two lines of chips and on both chips the vendor information has been spot on for power draw. In both cases you would have to understand all of the features that use power as they break power consumption up to very discrete pieces so that you can determine power draw in many specific instances. \$\endgroup\$ – Kortuk Aug 2 '11 at 22:02
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    \$\begingroup\$ @Russell Your assertion doesn't match up with the datasheet, which says that it pulls 260 uA/MHz when running a Fibonnaci number loop, and 165 uA/MHz when it is running a division algorithm loop. This difference in power depending on what's running squares with my experience with other microcontrollers. If you are saying this is not because of instruction differences, what is your alternate explanation? \$\endgroup\$ – wjl Aug 3 '11 at 14:15
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    \$\begingroup\$ @Wjl, I understand, as an expert in one area we try to share what knowledge we do have to help. \$\endgroup\$ – Kortuk Aug 3 '11 at 14:41
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No assertions from me :-) - I don't know enough about this cpu to assert anything. The following is based on experience, the datasheet and a good helping of guestimating.

Summary: Not enough data BUT

  • 200 +/- 50uA/MHz + allowance for activated peripherals as per Table 7-6 p46 in datasheet

Copied below.

In your position I'd

  • Lean heavily on Atmel.

  • Do some measurements myself.

  • Refine the rudimentary method suggested below.

enter image description here

Interestingly, the total of peripheral currents below sum to about 100 uA/MHz so the core consumption predominates. This suggests

  • a minimum of about 150 uA/MHz (a bit less than 165) and

  • a maximum of about 360 uA/MHz (based on the two ill defined datasheet examples = 260 + 100 from table).

I'd not lightly dismiss Fibonacci numbers as a "light load".
A significant portion of the current drain for a CMOS processor comes from charging and discharging capacitive nodes, whether memory bits or port pins or registers or whatever. Anything that causes more bit changes is liable to require more power. I don't know why their division routines is lower powered, but something that "just adds" is potentially able to change as many bits as most things.

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  • \$\begingroup\$ Thanks for your answer, you make some good points. I'd still prefer actual data, and I'm waiting for an answer from Atmel, but in the meantime I am taking a similar approach to what you've suggested. \$\endgroup\$ – wjl Aug 3 '11 at 16:51
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A microcontroller doesn't run "heavily". It's either running or not running. Some flavors have a additional standby mode, but that's not relevant to your question. Power consumption is going to be a function of clock rate, power voltage, and which peripherals are on.

The power consumption is not really a function of which instructions are being executed. At the same clock rate and power voltage, it will take pretty much the same power whether it's sitting in a NOP/JUMP loop or trying to calculate Pi to the zillionth decimal place.

On large systems with caches and a operating system that can put processes to sleep, power consumption can go up as the processor does more work. That's because the OS puts the processor in a idle mode or turns down its clock when there is nothing to do. When you give it a task it will have something to do and the OS won't put it in idle mode. However, microcontrollers don't work that way.

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    \$\begingroup\$ Actually, the power consumption is very dependent on the instructions executed in most microcontrollers. You'll notice that in the linked datasheet there is a 60% difference in power between their example "Fibonacci" and "division" algorithm tests. I've seen 500% differences in other microcontrollers depending on what is running. So what I meant by "heavily" is "continuously running doing real work (e.g. whatever the application needs to do), not spinning in a tiny non-representative example loop". \$\endgroup\$ – wjl Aug 2 '11 at 21:48
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    \$\begingroup\$ @wjl: I'm not that up on AVRs, but other micros I am familiar with don't exhibit much change in power at all depending on instruction. There is no cache, so every instruction has to be fetched, decoded, the PC updated, etc. I find 500% difference very hard to believe for a microcontroller. Are you sure it wasn't going to sleep when it had nothing to do? On large systems with caches, variable clock, and other fancy stuff it can certainly vary a lot, but you asked about a microcontroller. \$\endgroup\$ – Olin Lathrop Aug 2 '11 at 22:42
  • \$\begingroup\$ But don't you do something similar in any power-sensitive microcontroller firmware? Somewhere in the mainloop put the micro in sleep/low power mode, to be awakened by an interrupt? \$\endgroup\$ – markrages Aug 3 '11 at 0:15
  • \$\begingroup\$ @Markrages, that is not the same, we did that, but you can characterize how long you are on and off easily, if each instruction had a different power it would be frustrating at minimum. I have used the MSP430 extensivly and it did not have large variance when measured. Is it possible that the controller that wjl is using will use much less on average and the instruction has very little to do with total current draw but just have a small addition that varies widely? \$\endgroup\$ – Kortuk Aug 3 '11 at 0:43
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    \$\begingroup\$ I wouldn't be quick to rule out the idea of different instructions having different consumption. It is after all dynamic consumption which dominates - flipping bits as it were. Normally things may average out, but you could see how conceptually even different data to the same instruction could have different consumption if repeated enough to be measurable. Also consider different areas of logic that may be activated for different types of instructions (this chip has a dedicated multiplier separate from its ALU). \$\endgroup\$ – Chris Stratton Aug 3 '11 at 3:57

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