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Why do we use 32.768 kHz crystals in most circuits, for example in RTC circuits? What will happen if I use a 35 or 25 kHz crystal?

I assume because the IC internal Xin, Xout pin circuitry should be in CMOS/TTL/NMOS technology. Is it that true?

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    \$\begingroup\$ And if you halve the frequency 15 times? \$\endgroup\$ – Ignacio Vazquez-Abrams Jun 29 '15 at 7:11
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    \$\begingroup\$ @FEB1115: He (assuming) meant, what do you get if you multiply 2 for 15 times? \$\endgroup\$ – WedaPashi Jun 29 '15 at 7:18
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    \$\begingroup\$ @FEB1115 I think Ignacio Vazquez-Abrams is hinting towards the fact that \$2^{15}=32768\$ \$\endgroup\$ – K. Rmth Jun 29 '15 at 18:34
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    \$\begingroup\$ Bit OT... Another popular frequency for crystals was 4.43MHz (or there about). Early home micro-computers often used this. That's because crystals with this frequency was used to detect the color-signals in CRT color-TVs, so they were produced in large quantities (every color-TV needed one), and therefor very cheap (a concern for early home-computers). (It's possible USA and Europe used two different frequencies for color, but they'd both be in the 4 to 5MHz range.) \$\endgroup\$ – Baard Kopperud Jun 30 '15 at 11:22
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    \$\begingroup\$ @BaardKopperud NTSC (previously used in North America and Japan and a few other countries) used a color burst crystal frequency of 3.579545 MHz, which is why there were a number of chips, including an NS 1pps chip, that used crystals of that frequency. \$\endgroup\$ – Spehro Pefhany Oct 20 '16 at 14:23
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The frequency of a real time clock varies with the application. The frequency 32768 Hz (32.768 KHz) is commonly used, because it is a power of 2 (215) value. And, you can get a precise 1 second period (1 Hz frequency) by using a 15 stage binary counter.

Practically, in majority of the applications, particularly digital, the current consumption has to be as low as possible to preserve battery life. So, this frequency is selected as a best compromise between low frequency and convenient manufacture with market availability and real estate in term of physical dimensions while designing board, where low frequency generally means the quartz is physically bigger.

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  • \$\begingroup\$ one more doubt if some of the processors mostly used 27Mhz, it means because of the PLL input frequency require 27mhz to generate all other frequencies Am i right? \$\endgroup\$ – ramesh6663 Jun 29 '15 at 7:35
  • \$\begingroup\$ @FEB1115: I doubt if I've comprehended your question neatly, but from what I can understand I'd say, many a processors have an internal oscillators and once it is stabilized, the external crustal oscillator is used with necessary configuration of multipliers and/or divisors to obtain a typical desired frequency. This multiplier and/or divisor values are used by the PLL to generate frequencies of your interest and requirement. \$\endgroup\$ – WedaPashi Jun 29 '15 at 9:08
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    \$\begingroup\$ If you want to know why a processor uses an "odd" frequency, check to see if it has to deal with a signal at a multiple of that frequency. 27Mhz is useful for doing PAL & NTSC analog video. \$\endgroup\$ – joeforker Jun 29 '15 at 18:03
  • \$\begingroup\$ Do you instead mean $32.768$ kilohertz, not hertz? (Many SE readers live in countries where comma is decimal separator.) \$\endgroup\$ – Ruslan Jun 30 '15 at 10:33
  • \$\begingroup\$ @Ruslan: Yeah, valid point. I simply meant 2 to the power 15 = 32,768 Hz or 32.768 KHz. \$\endgroup\$ – WedaPashi Jun 30 '15 at 10:49
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The number 32768 is a power of 2, i.e. it is 2^15. If you have a 32.768kHz clock frequency it is easy to divide it to an 1Hz frequency using binary frequency dividers, a.k.a. binary counters, i.e. chains of flip-flops.

Having a 1Hz frequency means you have a clock signal which provides 1s time resolution: count the seconds with a counter, do the math and you have a Real-Time Clock (RTC).

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  • \$\begingroup\$ thanks for your quick answer, so do we need 16bit counter? could you please help me to give any use full link to learn my own to understanding or please explain it here. \$\endgroup\$ – ramesh6663 Jun 29 '15 at 7:24
  • \$\begingroup\$ I think you can use a 16bit counter and just use the most significant digit output as the clock signal output \$\endgroup\$ – tangrs Jun 29 '15 at 9:31
  • \$\begingroup\$ Or you can just divide the 32768 by 2^15 which can be done by placing 15 divide-by-2 circuits in series. See for an example of a divide-by-2 this article: electronics-tutorials.ws/counter/count_1.html First schematic from the top ! \$\endgroup\$ – Bimpelrekkie Jun 29 '15 at 10:19
  • \$\begingroup\$ I find it interesting that even devices with a 1/100-second readout still generally seem to use 32,768Hz crystals and bumping the count 25 times every 8192 pulses, rather than using a 32,000Hz crystal and dividing by 64, then 5, and then ten twice. \$\endgroup\$ – supercat Jun 29 '15 at 18:34
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    \$\begingroup\$ @supercat: To divide by any number that's not a power of 2 like 5 or 10 (or 20) you need a divide circuit (or an ALU or CPU). To divide strictly by powers of 2 all you need is a D flip-flop (or several cascaded in series: a circuit better know as a counter) \$\endgroup\$ – slebetman Jun 30 '15 at 3:15
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It's primarily due to cost. These particular crystals are dirt cheap due to the watch industry. This answer provides more detail, here's an excerpt:

There are 1.2 billion watches sold each year. The majority of them are inexpensive digital watches, requiring a small, 32kHz crystal. ...

As a result, these crystals are extraordinarily inexpensive... [Other crystals] cost 10 to 100 times more in quantity than these inexpensive watch crystals.

Further, these crystals are particularly well optimized for low power. Real time clocks are expected to run such an oscillator for 10 years on a CR2032 type cell. To get low frequency, low power, small crystals in other frequencies, you're looking at a substantial increase in cost.

In low volumes these crystals are still less expensive than even the normal or high power the 25kHz or 56kHz crystals, but cost the difference isn't large until you get into high volume manufacturing.

Choose what you need, but if you are going to produce a high volume product and can adjust your design to work with a 32kHz crystal, then there's a substantial financial incentive to do so.

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  • \$\begingroup\$ Do you think the 31.25 kHz rate for MIDI (based on dividing a common 1 MHz clock) was a mistake? Should MIDI have gone for 32.768? \$\endgroup\$ – Kaz Jun 29 '15 at 20:22
  • \$\begingroup\$ @Kaz Most midi machines would need a faster clock anyway. 1MHz and multiples of it are cheap and easy to obtain. I don't think there was any reason to use a 32.768kHz timebase in midi - even the volumes were low, so there'd be no big cost savings. \$\endgroup\$ – Adam Davis Jun 29 '15 at 20:49
  • \$\begingroup\$ @Kaz: Some UART designs require that the baud rate clock be synchronous with the main CPU cock and a multiple of 16x the desired baud rate. When MIDI was introduced, it was common for computers to use a clock derived from either a multiple of 1.0Mhz or 3.579545Mhz. Divide the former by 2 and then 16 to get 31250 precisely. Divide the latter by 7 and then 16 to get 31960Hz, which is about 2.2% fast. It might have been better to specify the MIDI rate as something like 31605Hz+/-1.2%, to make clear that any MIDI device should accept input at either rate. \$\endgroup\$ – supercat Sep 13 '16 at 17:21
  • \$\begingroup\$ @Kaz: If a UART requires a 16x clock, the next faster speed one could get from a colorburst crystal would be 37287Hz, and the next faster speeds from a 4.0Mhz timebase would be 35714 and 41667Hz, which are substantially to either side of it. The 31250Hz rate is probably the best one if systems will need to be able to derive it from a multiple of either 1.0Mhz or 3.579545Mhz (BTW, PAL would use 4.433619MHz; dividing that by 9 and 16 yields 30789, which is about 1.5% slow; maybe 31250 was chosen as a compromise between PAL and NTSC)? \$\endgroup\$ – supercat Sep 13 '16 at 17:26
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You can use any frequency you desire - provided your circuit is designed for it.

With CMOS chips, frequency is related to power consumption. So a 25KHz clock would consume less power than a 32.768 KHz clock. 35 KHz clocking would comsume slightly more power. You should do the math to determine your proper minimum/ maximum clocking, coordinated with the actual chips you select.

There is a tradeoff between clock speed, power consumption, and the amount of work you can get done per clock cycle. This varies from circuit to circuit.

RTCs as a class, are most concerned with power consumption when the main power is off - and you are running on the back-up coin-cell battery, but also still need to be reasonably accurate clocks as well - within a few seconds per month typically.

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