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I've been trying to interface ADC CS5532 to P89V51RD2. I have reset the ADC, written configuration bits to the configuration registers. I am trying to use the single conversion mode.

However, while reading, I either get a sequence of 24 0s or 24 1s. One thing that does happen is that the overflow bit is set whenever the input is above the reference voltage. This has got me confused very much now. If the ADC is reading the data and is acknowledging the overflow, why won't it give the the value? What seems to be the problem?

Thanks in advance.

I also am not understanding the role of the A0 and A1 latch pins. I'll be trying meanwhile.

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    \$\begingroup\$ Please provide a datasheet link. And perhaps the settings of the bus you're using. Thanks! \$\endgroup\$
    – Dzarda
    Jul 1 '15 at 10:49
  • \$\begingroup\$ Please post your schematic as well. Vref+ and Vref- are very important. A0 and A1 are only interesting if you are trying to connect an external multiplexer. \$\endgroup\$
    – JRE
    Jul 1 '15 at 11:52
  • \$\begingroup\$ I examined the circuit and added the part where the controller waits for the SDO pin to fall low which indicates the conversion has been completed. \$\endgroup\$ Jul 1 '15 at 12:08
  • \$\begingroup\$ Here is the link for datasheet.: google.co.in/… \$\endgroup\$ Jul 1 '15 at 12:08
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    \$\begingroup\$ They suggest 10 Ohm not 10k Ohm \$\endgroup\$
    – Alexxx
    Jul 1 '15 at 13:44
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I can't see your data pins between the MCU and ADC which limits my ability to respond, but I do see a few problems. First, you need 10 Ohms between VA+ and VD+, not 10k Ohms. Vref+ and VA+ need to be connected to the supply voltage, but that connection seems to be missing. If you measure voltage on those pins do you see 5V?

Can you provide any information on register setup and how you're triggering the conversion?

A0 and A1 outputs are configurable, but the most common use case is to indicate which analog channel is being converted probably for signal conditioning reasons.

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  • \$\begingroup\$ Thanks. The connections are virtual. You can see similar pin names on the connected terminals. I've done this for a clean schematic. Sorry if that confused you. I will check the reference pins for sure. About register setup: I am setting channel setup for gain 1, normal conversion on AIN1, no calibration, 7.5sps data rate for digital filter and single conversion with VRS = 0. I still agree with you guys about Vref+ and Vref- pins. I will check and inform. Thanks once again. \$\endgroup\$ Jul 1 '15 at 16:31
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After struggling with the device for one more day, I have finally solved the problem. The problem lies in the output rate of the input digital filter. I played all day with all the registers and settings I could before coming to this conclusion. I was trying to set the filter output rate at 7.5 SPS which now I've changed to 3840 SPS. I still don't understand how this worked for me. Will research further on this topic.

Once again THANKS everybody that took time and participated in the quest!

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