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I started learning about pointers in C++ and I figured I should educate myself a bit on how memory works and is accessed. I read that when we say a processor is 64-bit, it has a 64-bit register and can access 2^64 address locations. I also read that it can fetch 64/8, so 8 bytes of data at a time, but the data bus is not the same thing as the register right? Do they need to be the same size or does that just happen to be the case usually? And is it the size of the register or the data bus size that determines what we refer to it as, such as 32/64-bit? Also is there a difference between register size and address size?

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    \$\begingroup\$ There are so many differences and variants and variations that it's almost not worth trying to consider how they relate at all. \$\endgroup\$ – Ignacio Vazquez-Abrams Jul 8 '15 at 2:14
  • \$\begingroup\$ See this related question. \$\endgroup\$ – Samuel Jul 8 '15 at 2:49
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When you refer to a 64-bit or a 32-bit it doesn't need to imply any register width or bus width alone. You can multiplex a bus such that it reads 64 bits in two reads or four reads etc. A CPU design can be as creative as the engineer behind the logic blocks. A good example is the 8086 with a 20 bit address space and a 16 bit data bus. The software that you write in C++ wraps on top of many layers of compilation and hardware state machines such that this is abstracted away. In RISC design you'll find that registers width and ALU width are almost always the same width, but in CISC design this does not need to be the case so much.

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    \$\begingroup\$ -1: when we call a machine N bits that mostly does not refer to the memory address space (that would classify all the classic 8-bitters as 16-bitters!) but to the dominant width of the ALU, datapath, and registers. \$\endgroup\$ – Wouter van Ooijen Jul 8 '15 at 8:11
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    \$\begingroup\$ Wouter is right. This answer is completely wrong. Most 8 bit CPUs have anywhere from 11 to 16 bits of address space. Then you have the problem of Harvard machines having different address space for program and data. \$\endgroup\$ – slebetman Jul 8 '15 at 9:34
  • \$\begingroup\$ Ok I retract that it mostly refers to the Address space. That was not a major portion of the point I was making so it isn't "completely wrong". In Intel systems we say 64-bit/32-bit because we're interested in the memory address space. If the CPU uses 32-bit registers it doesn't mean it can't support 64 bit math. If you're using a Microprocessor you're more aware of the actual hardware in which case they'll specify what the address width is and what the data width is. In more complicated CISC CPU designs you work at some level of abstraction even in assembly code. \$\endgroup\$ – Matt Jul 8 '15 at 17:29
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Width of the processor will be defined by the width of the registers inside. The ALU will be able to process the registers directly. The data bus width and the address capacity seldom defines the processor bits.

PS: A 32 bit compiler and a 64 bit compiler gives different results on a 64 bit machine.

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  • \$\begingroup\$ The ALU does not need to be the same width as the address space. You can use carry out bits and successive additions, subtractions, multiplications to design a circuit that behaves as if the address width was the same as the ALU width and the registers etc. Look at the Intel 8086. \$\endgroup\$ – Matt Jul 8 '15 at 4:20
  • \$\begingroup\$ @Matt Yes. ALU does not need to be the same width as the address space \$\endgroup\$ – Umar Jul 8 '15 at 4:45
  • \$\begingroup\$ ALU doesn't even need to be the same width as the registers. This is all up to implementation, but if the designers include a diagram then you can depend on that as a reference. I can design a 32-bit register and 16-bit ALU using state machines and achieve something that feels as if it we're 32-bits \$\endgroup\$ – Matt Jul 8 '15 at 4:48

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