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When an ARM device is booted and before the kernel starts, does the device have the knowledge of the address of the devices that needs to be initialized to a bare minimum? When does the MMU functionality starts? from the booting or the kernel? if from kernel, who manages MMU functionality before kernel.?

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  • \$\begingroup\$ Which hardware? \$\endgroup\$ – pjc50 Jul 9 '15 at 4:39
  • \$\begingroup\$ Arm Cortex -A7 processor \$\endgroup\$ – Madara Jul 9 '15 at 4:43
  • \$\begingroup\$ What kernel? And why is this tagged "communication", that's a nonsense tag. \$\endgroup\$ – Lundin Oct 8 '15 at 11:02
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I happen to have the i.MX53 reference manual open, which says very little about the MMU except this paragraph:

Boot ROM includes a feature of enabling the Memory Management Unit (MMU) and caches to improve boot speed when performing a secure boot with SEC_CONFIG=Closed ( High Assurance Boot (HAB)). L1 instruction cache is enabled at the start of image download. L1 data cache, L2 cache and MMU are enabled during image authentication.

So the MMU starts 'off' or in a transparent mode, where all addresses are treated as physical addresses. The boot ROM in this particular chip can establish a simple mapping and turn it on, which is required to use the cache: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka13835.html

(High Assurance Boot will run quite a bit more code than the regular bootloader in order to verify the signature of the operating system before handing over control to it.)

Once the operating system has been loaded, it will re-initialize the MMU to its own preferences early on in the boot sequence.

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