I know D flip-flops retain a certain logic level(memory) but when they output(i.e. shift) this retain memory do they loose it?
for example: lets say I have 3 d flip-flops connected as a serial shift register. And send an input signal of 1,0,1 in 3 consecutive clock pulses. The logic levels of D flip-flops will be D1=1 , D2=0 , D3=1. Then stopped the input stream but keep on sending clock pulse. what would be the final memory state of these flip-flops be? 1,1,1 or 0,0,0
thanks in advance.
Edit: This is what the circuit would look like.
So the question would be do you need to constantly keep sending input 1 to D1 to keep it in logic 1? or can you just stop the input.