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What's the proper way to model really long wires in circuits (18ga, ~1500 ft)? I'm aware that over long lengths start to accrue non-ignorable resistances. I'm wondering if they start to get other attributes as well (inductance / capacitance) and what your approaches are on modeling them for simulations? How can you predict these features? (Resistance is really easy since it's just ohms/1000ft on a lookup table).

My first attempt is below. I've got a long wire modeled up as a resistor and inductor in series. Is this an appropriate way to do it?

Problem context (How I got here / why this matters to me): I'm looking to provide ground closure on a distant relay circuit. I want to use logic (5V) to drive a circuit that powers a relay that is very far away (maybe more than 1500ft). My investigated options are as follows:

  1. Electromechanical relay (with mosfet driver)
  2. Mosfet
  3. Transistors
  4. Solid State Relays

I originally decided to close the circuit with a relay (yes a relay to start a relay), but am wondering if a MOSFET can do the job. Are there any "gotcha's" to switching a very long circuit with a mosfet? I feel like I'm not taking into account the inductance of the line (how would that affect my circuit?) I've searched the forums and found that putting mosfets far away from their gate drivers is an issue. Is it similar for what the mosfet is driving (drain/source?)

Additional info:

Design Considerations:

i. Very low leakage current over the line when turned off. (much less than a uA if possible).

ii. Low switching frequency (only turn these on once every week or so).

iii. Low throughput current across the switch (~40mA when turned on).

iv. Reliability. Can't have a switch stick on/off/be unresponsive.

I believe that #3 along makes a normal switch not a good choice (minimum current to ensure the switch turns on needs to be ~100mA usually, right?)

Here's a diagram of the circuit just in case I wasn't clear (The mosfet/resistor can be replaced with any switching/driving element):

My circuit

I simulated it with LTSpice attempting the following:

  1. Modeled the relay as an inductor/resistor pair (series).
  2. Modeled the wire as an inductor/resistor pair (series).
  3. Toggled the values / tried to see what changed the behavior.

I tried to get a situation where the resistance/inductance was very minimal, and then one where the inductance was on par with the relay.

So here's the general circuit modeled. basic

And here's all four that I ran next to eachother with different values: four

And results of current and voltage drops across the relay (which is what I care about since I need it to turn on): Current through relays

Voltage over relays

"Experiment" Results:

  1. Under ideal wire conditions (no inductance/resistance) in the line, the signal snaps up to 14V when the mosfet is closed.
  2. With resistance added to the wire, the voltage drags down as time goes on to a stable value (but it still looks okay)
  3. With resistance and a little inductance, it behaves basically the same as 2.
  4. With resistance and a lot of inductance, the circuit actually flips around and rises up to the stable voltage. Weird.

Any comments on my methods? Am I doing this right?

edit: flipped diode (Found out very quickly it was facing the wrong direction when I simulated in LTSpice and had 220Amps flowing. Also thanks to Mr Karas for spotting it), and added simulation results. (See above)

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  • \$\begingroup\$ Your diode across the relay coil is facing the wrong way. Reverse its connections so it does not cause an excess current rush when the MOSFET turns ON. \$\endgroup\$ – Michael Karas Jul 17 '15 at 0:16
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    \$\begingroup\$ Thanks man. I got a big "hmmmm" moment when LTSpice said I was drawing 200 amps. Fixed and added simulations. \$\endgroup\$ – bathMarm0t Jul 17 '15 at 0:58
  • \$\begingroup\$ Note: you've only modelled one side of the wire, not the wire from the positive supply to the relay. I don't think it actually matters in this case, but if you were experimenting with snubber capacitors it might. \$\endgroup\$ – pjc50 Jul 17 '15 at 14:20
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There are three main issues that come to my mind:

  1. Wire resistance: you already took it into account.
  2. Wire inductance: you already took it into account, too (more on this later).
  3. Transmission line effects: these will affect your circuit if the wires have a length which is comparable or greater than the minimum wavelength of the "signal".

About point 3: since you are not concerned with signal integrity (your "signal" is the power rail to the relay) you only need to worry if your switching times are too quick (some energy could be reflected back from the line toward your transistor ad fry it). If you switch the MOSET relatively slowly the frequency content of the "step" (a ramp, actually) won't hit that limit and you won't have problems, apart from higher power dissipation in the MOSFET during switching, but given the extremely low duty cycle of the system it is of little concern here probably.

Anyway LTspice has two different models that can represent transmission lines: a lossy one and a non-lossy one. Excerpts from the online guide:

T. Lossless Transmission Line Symbol Name: TLINE

Syntax: Txxx L+ L- R+ R- Zo= Td=

L+ and L- are the nodes at one port. R+ and R- are the nodes for the other port. Zo is the characteristic impedance. The length of the line is given by the propagation delay Td.

This element models only one propagation mode. If all four nodes are distinct in the actual circuit, then two modes may be excited. To simulate such a situation, two transmission-line elements are required. See the schematic file .\examples\Educational\TransmissionLineInverter.asc to see an example simulating both modes of a length of coax.

and:

O. Lossy Transmission Line

Symbol Name: LTLIN

Syntax: Oxxx L+ L- R+ R-

Example:

O1 in 0 out 0 MyLossyTline .model MyLossyTline LTRA(len=1 R=10 L=1u C=10n)

This is a single-conductor lossy transmission line. N1 and N2 are the nodes at port 1. N3 and N4 are the nodes at port 2. A model card is required to define the electrical characteristics of this circuit element.

Model parameters for Lossy Transmission Lines

[...table with all parameters omitted...]

Point 2 is more problematic, especially when switching the relay OFF: you could have an inductive kickback that destroys your MOSFET due to the wire inductance. Note that the diode across the relay won't protect you in this case. Thus a protection Zener at the switching transistor output (between drain and ground, cathode connected to drain) may be necessary to dampen that inductive kickback.

An article on the subject is here (not directly related to your specific case, though).

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  • \$\begingroup\$ Wow. Searches on TLINE and TFLINE really sent me down the rabbit hole. I believe these models to be a little beefier than I need, but it's pretty neat to know about this stuff. I was aware about inductive kickback issues (hence the relay), and was thinking how silly it is that you would need a 1500 foot diode connected to ease the "inductor" wire in the same manner. The zener/tvs solution makes a lot more sense. Thanks. \$\endgroup\$ – bathMarm0t Jul 22 '15 at 1:11
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Within transmission line model you should also add capacitance altho its value in this case is negligible.

In real world application, you`d want to use some output protection for example current limiting in case of short and diode for ESD. Your frequency is very low so you can use series resistance on nmos gate 1k or so. It will turn on in us time and your drain from source will be <5mA.

Hope this helps.

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  • \$\begingroup\$ Hey man, Thanks for the response! Your answer was a little more vague than Lorenzo's (within transmission line model? I get it now, but it wasn't obvious prior that ltspice had one). Will definitely add the esd protection to the circuit. \$\endgroup\$ – bathMarm0t Jul 22 '15 at 1:13
  • \$\begingroup\$ Lorenzo already explained what I was going after with 'transmission line model', with the two models in LTspice. You do not really need to use it for this frequency. \$\endgroup\$ – DominicusPlatus Jul 23 '15 at 14:58

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