I am routing a PCB with MOSFETs in LFPAK (aka SOT-669, Power SO8) packages for the 1st time. They look like D2PAK. The manufacturer, NXP, advises to draw identical polygons on top and bottom sides, connected to the drain tab, and linked together by vias, to transfer the heat from top to bottom side (bottom side cooling). They suggest to put the vias right through the drain pad, and around it.
They mention vias with 0.8mm (32 mils) hole diameter, but they don't comment on how they came up to this value. Isn't it too big ? I am concerned about the solder paste filling all the vias and the MOSFET not being soldered well. I'll have them soldered in an oven.
My reference : https://assets.nexperia.com/documents/application-note/AN10874.pdf, page 16.
Should I use thermal relieves to connect the MOSFETs to the polygons ? I've read I shouldn't use them for vias.