We have designed quite a few FPGA-based boards, and so far, we have used a lot of bypass capacitors. Our rule of thumb was, "as many as we can".
In our next design, we would like to reduce the part count. Since BGA packages are quite dense, the distance between several supply pins (say for the 1.2V VccInt rail) are quite small (<1cm in most cases).
Would it make sense to replace 4 100nf capacitors for 4 supply pins with a single, larger bypass capacitor, located such that it is as equidistant to the 4 pins as possible?
EDIT: Here's the source of my confusion: Xilinx has a PCB design guide for Spartan 6 devices here. For example, if you look at Table 2.1 on page 14, for an LX45 device with FGG484 package, for the VccInt rail, it recommends a total of 1 100uF, 1 4.7uf and 2 0.47uf capacitors. The thing is, this device has 20 VccInt pins!. Is it really recommending using 2 0.47uf capacitors for 20 pins?
To add to the confusion, Xilinx's own evaluation board for the same device has 6 2.2uf, 5 10uf, and 1 470uf capacitors for the same 1.2V VccInt rail!