I'm designing a PCB for an IC that includes a DC/DC buck converter (MP2617). This is my first PCB, so I've been using the following resources for the layout: 1 and 2 (PDF files, the first one is a general layout guide for buck converters, the second one is a datasheet for another buck IC that has an extensive layout section).
I'm puzzled by an apparent contradiction between the two documents:
Document 1 says (page 7, paragraph 2):
Because high frequency of several hundred MHz is loaded on ground of input, so placing ground of CIN and CO 1cm to 2cm apart is recommended. If they are close to each other, high frequency noise of input may be propagated to output through CO.
whereas document 2 says (page 20):
The (–) plate of COUT should be closely connected to PGND and the (–) plate of CIN.
The point at which the ground terminals of the VIN and VOUT bypass capacitors are connected makes a good, low noise reference point.
Who should I believe here?