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I'm designing a PCB for an IC that includes a DC/DC buck converter (MP2617). This is my first PCB, so I've been using the following resources for the layout: 1 and 2 (PDF files, the first one is a general layout guide for buck converters, the second one is a datasheet for another buck IC that has an extensive layout section).

I'm puzzled by an apparent contradiction between the two documents:

Document 1 says (page 7, paragraph 2):

Because high frequency of several hundred MHz is loaded on ground of input, so placing ground of CIN and CO 1cm to 2cm apart is recommended. If they are close to each other, high frequency noise of input may be propagated to output through CO.

whereas document 2 says (page 20):

The (–) plate of COUT should be closely connected to PGND and the (–) plate of CIN.

...

The point at which the ground terminals of the VIN and VOUT bypass capacitors are connected makes a good, low noise reference point.

Who should I believe here?

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  • \$\begingroup\$ You could, possibly, include the page numbers and/or sections? Many design decisions are very context sensitive. In general, if you have a strong ground point it may likely be best to route everything to that directly, but without passing each other before the reach it. Using a ground plane or much thicker main trace you can potentially change that point to somewhere else. But, as said, very context sensitive. \$\endgroup\$ – Asmyldof Jul 26 '15 at 17:48
  • \$\begingroup\$ Two things are sure: "Place the input capacitor as close as possible to the IN and PGND pins." MP2617 Datasheet page 27. The other one: "Place the output inductor close to the IC and connect the output capacitor between the inductor and PGND of the IC. " page 27. \$\endgroup\$ – Bence Kaulics Jul 26 '15 at 17:56
  • \$\begingroup\$ Thanks. I do have a large ground plane/pour on both sides. I'm trying to choose between two layouts, one has direct return paths between COUT, CIN and PGND but COUT and CIN close together (and is the better layout for connector placement), the other has COUT returned to PGND through several vias to keep COUT away from CIN. \$\endgroup\$ – Damien Jul 26 '15 at 18:04
  • \$\begingroup\$ BTW I cannot add the link to the MP2617 datasheet in the main post because I am limited to 2 links per post. \$\endgroup\$ – Damien Jul 26 '15 at 18:05
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There is a lot of ripple current in the input caps in a buck converter. However, if you have a good solid ground plane you don't need to worry about "frequencies of several hundred MHz being loaded on ground of input." Further, your large output caps will have a self-resonant frequency below 100s of MHz and will essentially be inductive at those frequencies.

In all the many hundreds of buck converters I've laid out or looked at I've never seen a problem where input ground noise couples through the ouput cap's ground to the output. Many of these had a close low-inductance connection between input and output caps. Where are they suggesting the output reference is anyway? Wouldn't it be the negative terminal of the output cap?

This is not to say that ground noise can't be a problem. Poorly designed grounding schemes can absolutely lead to a noisy output. It's just that tightly coupling the grounds of the input and output caps is not a problem in my experience.

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  • \$\begingroup\$ That answers my question. This is my current layout with COUT close to CIN: image. Is it an issue if the bottom layer ground pour and the VIN trace go under the SW node? \$\endgroup\$ – Damien Jul 26 '15 at 20:28
  • \$\begingroup\$ The switch node and any copper underneath it form a parallel plate capacitor, which can couple switching noise into whatever is on the adjacent layer. That's why it's recommended to keep the switch layer copper area just big enough to carry the required current. (Looks OK in your layout.) Some people like to relieve the planes directly underneath the switch node to preclude any possibility of coupling, which can't hurt but isn't always necessary. \$\endgroup\$ – John D Jul 26 '15 at 23:05
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There are plenty of guides, including in most datasheets. But in general, input capacitor must be as close as possible to the IC leads. Also try placing the diode so the ac current mesh doesn't change much when switching occurs.

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You want to reduce the area of high-current traces. Ground pads of input, output caps, plus IC power ground pad must be as close together as possible. If you have signal ground plane underneath, you may want to remove it as well. Take a look at Linear Tech PCB layout appnotes for further inspiration. AN136 is particularly good and highly recommended.

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