# Why does this work for biasing an AC signal for A/D conversion

I have a working circuit for biasing the AC signal going into my ADC, but I cant quite wrap my head around why it works. I can see that it resembles a high pass filter but how/why does it add the two voltages together? For example if the AC signal is at 1.5V, the ADC input is at 4V (1.5V + 2.5V).

The 2.5V comes from a simple voltage divider circuit. The AC signal is coming from a voltage follower op amp. Agreed with the answer given by @KyranF, but I would also like to add that capacitors resist change in voltage. This means that when the AC voltage swings between -2.5V and 2.5V, the capacitor will draw/produce (Depending how you look at it) whatever current it needs to maintain this voltage. So that causes a voltage/current swing in the 1MΩ resistor.

I would also argue that the circuit given by @Black Emperor is not entirely wrong.

Ideally (Note ideally) an ADC pin would not draw any current, so we can treat the ADC node as an open circuit. Let's say we apply zero volts at the AC signal pin for a very long time. The cap would also be an open circuit and there wouldn't be any current flowing through the resistor, thus the ADC pin sees 2.5V, this is the known bias.

If the AC signal starts to fluctuate, the cap would force the voltage across it's terminal to remain the same, causing current to flow and changing the voltage across the resistor which can be read by the ADC.

The only reason why I wouldn't suggest to implement that exact circuit is because a cheap ADC would have a low input impedance. This low input impedance might be on the same scale as the 1MΩ resistor (causing it to appear less like an open circuit) and current would start to sink into the ADC and possibly cause damage.

Hope I was clear, good luck!

• Josh
• This seems to answer all of my questions, however the one thing I am still having trouble with is when the cap "forces the voltage across the terminal to remain the same (as what?), how does it affect the voltage that is already present (2.5V)? Thanks btw! – BBales Jul 28 '15 at 1:41
• No problem. Glad I could help! Capacitors resist voltage change across their terminal. So let's say the AC pin was at zero for a long time, the voltage difference over the cap would be 2.5V. So when we increase the AC pin voltage, this voltage over the cap would remain the same 2.5V which would cause the ADC pin to also increase in voltage in order to maintain the difference of 2.5V across the cap. What I just said might not be very clear... Let me know if you have more questions. – Josh Jobin Jul 28 '15 at 9:43

It's not quite like that, let me show you the proper circuit: simulate this circuit – Schematic created using CircuitLab

C1 is a DC blocking capacitor - meaning at steady-state, the right-hand side does not know what's going on with the left side. When there is a difference in voltage, things start to happen. This allows us to pretend in DC analysis that the capacitor C1 is an open circuit, leaving the node between R1 and R2 a simple voltage divider of 2.5V.

When there is a sudden change on the input signal on the left side of C1, the change is reflected on the right hand side, and the voltage divider no longer acts like that - rather the node voltage will change to reflect the change on the input. If the left side shows a -400mV drop below 0V, the node on the right will be 2.5v - 400mV until the capacitor charges anyway.

The 2.5V "bias" on the right side allows single-supply circuitry like a microcontroller's ADC to read values which it normally cannot. You can deal with the bias in software, to read out +-2.5V from that sense input.

• So the node voltage will be 2.5V + the change on the left hand side? Also, what would the 1M resistor do if it was between the voltage divider and the node? – BBales Jul 27 '15 at 23:16
• @BlackEmperor I'm not sure what you mean by between the divider and the node, but usually 1M resistors are used as "shunt" or discharge resistors, to ensure during an "unpowered" or shutdown phase, the capacitors are discharged to a known state (0V) – KyranF Jul 27 '15 at 23:36

Even though the OP didn't provide schematics to the converter circuit, The reason why you should have the 2.5VDC offset is because of the DC voltage at the Vref pin when its capacitively coupled to AC common. This is actually normal here since 2.5V is half way between the OP's Vcc and DC Gnd which is where the bias at signal zero crossing should be. This is why some designers use split rail power (+/-V) so the offset input voltage DC offset product is near 0V.

The only issue I see is that you trying to actively bias a circuit that already has the bias circuit installed in the ADC. So I would suggest that you refer to the data sheet of the ADC so you can see how they supposed to be build up with the "typical circuit design" and go from there if you want to play with modifying circuit parameters.