Fast, high resolution ADCs, especially ones that have parallel output, usually have a separate supply pin (DRVDD, (drive vdd) or OVDD (output vdd)) presumably because they don't want to couple noise to the sensitive analog supply while all the digital output signals toggle.
Most ADC datasheets recommend a single unbroken ground plane right under the device and connect the OGND and GND to this plane with the least possible inductance.
We have a situation where we have several of these ADCs on a single board. I'm wondering whether the "single unbroken ground plane" recommendation still holds even when there are multiple ADCs on the PCB.
In our design we went with two separate ground planes, one for GND (gnd of VDD), the other one for OGND (gnd of OVDD), and we connected these two planes near the edge of the PCB, where power enters through an adapter jack.
Any ideas, real world examples or links to reference documents will be appreciated.