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So ive built up the following schematic as a simple current limit circuit. When the current limit is not in place, ie the PNP is conducting "fully", I null any offset errors in the Differential Amp (CA3140EZ Op Amp) which nicely matches the actual voltage drop across the Shunt Resistor and output of the Diff Amp (Pin 6). Everything works perfectly until the current limit kicks in; when this happens the Diff amp always outputs 10-15mA less than the actual Voltage drop across the Shunt. If i now lift the current limit again by increasing ISet the two outputs match perfectly again.

I have spent a lot of time finding the cause of this but to no avail. Can someone please explain to me what is happening and how i can remove this error?

enter image description here

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  • \$\begingroup\$ What is the Vcc used in this circuit? \$\endgroup\$ – rdtsc Jul 30 '15 at 11:50
  • \$\begingroup\$ Im using a 12 volt wall adapter \$\endgroup\$ – Adil Malik Jul 30 '15 at 11:52
  • \$\begingroup\$ Have you looked at the CA3140 output with a scope (during current limit)? \$\endgroup\$ – Spehro Pefhany Jul 30 '15 at 11:58
  • \$\begingroup\$ Yes i did just now, and it seems clean both with and without the current limit. No Oscillations. \$\endgroup\$ – Adil Malik Jul 30 '15 at 12:44
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Page 3 of the CA3140 Datasheet shows 5-15mV input offset for this amp, but that should be correctable with R3. It almost seems as though the offset nulling isn't working at all. Note on this page it also recommends R3 be 4.7k for the CA3140 and 18k for the CA3140A. Additionally, it shows several alternatives on page 7 for more nulling resolution.

Any particular reason why 100k was chosen for the differential input resistances? High resistances introduce more noise, as fewer electrons are physically moving through them ("shot noise.") A lower value will give a less noisy output at the expense of added current draw. It also will skew the reading, as it's drawing some power from across R9, which will mean a larger null correction. So there is definitely a lower boundary for the value. Unless the 1% values are off in just the wrong way however, it wouldn't explain the error.

As for this amp's true "rail-to-rail output" capability, it simply says "Output Swing Complements Input Common Mode Range", which is then defined as "Wide Common Mode Input Voltage Range (VlCR) - Can be Swung 0.5V Below Negative Supply Voltage Rail". This is ambiguous... is it a true rail-to-rail opamp or not? You should definitely connect a 'scope to it's output and see what is going on as Spehro hints to. There could be high-frequency oscillations, solvable with a small (pF) capacitance across it's inverting feedback loop.

If prototyped on a solderless breadboard, often the parasitic inductance and capacitance of the busses and insulators can cause unwanted (or wanted!) behavior, which should not manifest on a well-routed PCB. Even if it's not "needed", it would be a good idea to leave a pad for this capacitor on a finished PCB, just in case one needs to be added in practice. C10 rolls off IC1A's response to a relatively low frequency, but there is no such frequency limit on IC3, just R5.

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  • \$\begingroup\$ Thankyou for all of these insights, i have built this up on a PCB so i dont think stray capacitance is the problem.i tried to remove IC3 out of the equation by injecting a voltage at pin 6 from an external pot , this only reveals further odd behavior: I set the Pot to 150mV, but when i hooked this in circuit, with the Current limit not active pin 6 jumped up to about 160mV. Once current limit was active Pin 6 reverted back to the actual set voltage of 150mV. it seems the Diff amp is not the problem? I have probed pin 6 both with and without current limit and the output seems clean. Stumped :/ \$\endgroup\$ – Adil Malik Jul 30 '15 at 12:43
  • \$\begingroup\$ Update: i have created another question as i feel i have pin pointed the source of the error. It seems to be related to Load impedance. electronics.stackexchange.com/questions/182654/… \$\endgroup\$ – Adil Malik Jul 31 '15 at 14:38

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