2
\$\begingroup\$

I'm a software development student, who want to improve its hardware knowledge.

I'm reading Structured Computer Organization by Tanenbaum. In the chapter 2, the author says the following:

"[...] In recent years, nearly all computer manufacturers have standardized on an 8-bit cell [...]".

I thought this was correct, but searching over internet, I found there is no memories with 8-bit per cell!

So, my question is: Is it an error of the author or I misunderstood what he tried to explain? If so, what is, "usually", the number of bits per cell and how could I see the bits per cell of my memory?

\$\endgroup\$
1
\$\begingroup\$

There seems to be some confusion between memory organization (which is most often integer multiples of 8 bits wide) and bits per memory cell.

Storing more than one bit per cell can be achieved by storing an analog voltage that can be differentiated into \$2^n\$ different levels for \$n\$ bits. MLC flash can have 2 or 3 bits per cell, requiring 4 or 8 levels. It becomes progressively more difficult and thus more prone to errors and bad yields as the number of bits increases.

\$\endgroup\$
  • 1
    \$\begingroup\$ There was/is an analogue IC storage system by ISD for message recorders that stored an analogue signal that could theoretically have been used to store 256 levels giving 8 bits per cell but it would have been unreliable except for analogue value storage. \$\endgroup\$ – KalleMP Aug 2 '15 at 18:00
  • 1
    \$\begingroup\$ As @KalleMP says - the ISD product (now some other name) is one of the few that genuinely does this. I have used their products for analog speech recording use (as they intend) and for that purpose it works very well. \$\endgroup\$ – Russell McMahon Aug 2 '15 at 22:12
  • \$\begingroup\$ @Russell I still have a few rails of the ISD parts left over from an advertising project years ago. \$\endgroup\$ – Spehro Pefhany Aug 2 '15 at 22:15
  • \$\begingroup\$ @SpehroPefhany I have some too - 2590's I think - used in talking communication aids that I used to make. \$\endgroup\$ – Russell McMahon Aug 3 '15 at 1:40
4
\$\begingroup\$

They must mean that a smallest addressable unit is 8 bits which is called a byte or sometimes they even call that smallest addressable unit as a cell.By grouping these cells you get a word.

So a 64 bit computer has 8 cells/word.So in effect they are likely x8 systems

\$\endgroup\$
2
\$\begingroup\$

This quotation seems to be using the word "cell" to mean an addressable storage location, where most of us would consider a cell to be a thing capable of storing one bit.

I don't know the vintage of that book, but older memory ICs were organized so that each addressable location would store 8 bits (1 byte, or memory word).

\$\endgroup\$
  • \$\begingroup\$ 1st edition 1974, the one he's reading most likely 1990-ish. Funny thing is, many systems still allow byte addressing. Whether it's fast or desirable on them is another thing. \$\endgroup\$ – Asmyldof Aug 2 '15 at 17:11
1
\$\begingroup\$

There are so many types of memory that is hard to answer.

What was "standardized" (wich standard ?) was the byte (octet) as a fundamental size on a computer. This means that, usually, computers have how to deal with 8 bit numbers, even if they are 32 bits. A byte is 8 bits anywhere, but the computer WORD might have other sizes, multiplies of a byte (ex.: 32bit word wich is composed of four bytes etc). It might even arrange those bytes in different orders (MSB first, LSB first etc).

But, on memories, you might find a lot of types. You might find a 8 bit EPROM, or a single bit RAM (where you need to group 8 ram chips to get a single byte, etc). Or even full 64bit memories that transfer 64bit words at a time.

But, even when all the memories have different word sizes, you can still ADDRESS all memories in 8bit boundaries.

For example :

If your "cell" was 32 bits, thats how the program would be stored in memory:

100 add r1, r2, r3
101 sub r3, r5, r1
102 br 100

If your "cell" is 8 bits, thats how it is stored in memory :

100 add r1, r2, r3
104 sub r3, r5, r1
108 br 100

In the past, some computers worked like the first example, having memories cells of 32bits (or 36, or 24 etc.), so, in that case, the "standardization" was to accept a single memory "cell" size (8bits) and work other sizes from that.

This does not mean that a computer cant access the RAM in lumps of other multiples of 8 bits (16, 32, 64, etc.). You might have instructions like

 MOV EAX, [BP+10000] // hipotetical, i dont know if this addressing mode exists
 // wich will transfer 4 bytes in a single cycle into the EAX.

But the BP+10000 in the instruction still sees the memory as made out of 8bit cells.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.