# Versatile input termination / translation for reference clock?

I've got a microcontroller I want to clock from an external 10 MHz reference. I'd like the reference input to be as versatile as possible. At the moment, my reference is an LVCMOS square wave, but other folks have various levels of sine wave references.

I'm going to use a 74LVC1G17 to condition the input, fed with 3.3 volts (the microcontroller runs at 5v, but I've already tested that it will accept a 3.3v clock).

The remaining question is how best to terminate and/or condition the input, and what range of input signals it will accept (assuming regular, stable, 10 MHz, 50% duty cycle input).

I've googled around and learned about AC parallel termination and Thevenin termination, but in simulating them in circuitlab, I don't see the transitions lining up the way I'd expect.

In particular, a series cap feeding a voltage divider on the input doesn't give me a square wave centered on Vcc/2 like I'd expect.

simulate this circuit – Schematic created using CircuitLab

• RE "In particular, a series cap feeding a voltage divider on the input doesn't give me a square wave centered on Vcc/2 like I'd expect." If you're using a CMOS source, it's probably not able to drive a 50-ohm load. Try with maybe R1 = R2 = 10 kohms. Commented Aug 7, 2015 at 20:37
• I mean that in circuitlab I'm not getting that square wave centered on Vcc/2. Circuitlab's voltage and function sources are supposed to be ideal. Commented Aug 7, 2015 at 21:07
• Are you not getting a square wave, or not getting it centered on VCC/2? How long did you run the simulation? You should run it for at least 15 us to give enough time for V2 to charge up C1. Commented Aug 7, 2015 at 21:23
• @ThePhoton is absolutely right. I was starting the simulation at T=0. Skipping forward a few µs fixed it. If you write that as an answer, I will happily accept it. Commented Aug 8, 2015 at 4:36