The schematic is part of a circuit for a radar project by MIT. The shown schematic is a gain stage followed by what appears to be two Sallen Key LPF stages with cut-off frequency of 15 KHz. There is a +5V DC bias probably to avoid clipping the signal. The MAX414 Op-Amps are powered with 0, +12V.
I would like to change the cut-off frequency to say 100 KHz by changing the values of the Rs and Cs. The gain should stay the same.
I know how to design one active LPF stage as in here. However, what I can't understand is how to match each of the stages in the MIT's circuit to the standard circuit of Sallen Key shown in the link. More specifically, what is the MIT's value of R1 for each stage?
What is confusing me is the existence of an extra resistor in each stage: Take the second Op-Amp for example which is the first LPF stage, should we consider R1 to be 8.45K or 102K? or the parallel equivalent? If we want to strictly follow the standard Sallen Key topology, the 102K shouldn't be there. What is the purpose of having it? and how is it going to affect the cut off frequency that depends on R1,R2,C1 and C2?