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LPF Schematic

The schematic is part of a circuit for a radar project by MIT. The shown schematic is a gain stage followed by what appears to be two Sallen Key LPF stages with cut-off frequency of 15 KHz. There is a +5V DC bias probably to avoid clipping the signal. The MAX414 Op-Amps are powered with 0, +12V.

I would like to change the cut-off frequency to say 100 KHz by changing the values of the Rs and Cs. The gain should stay the same.

I know how to design one active LPF stage as in here. However, what I can't understand is how to match each of the stages in the MIT's circuit to the standard circuit of Sallen Key shown in the link. More specifically, what is the MIT's value of R1 for each stage?

What is confusing me is the existence of an extra resistor in each stage: Take the second Op-Amp for example which is the first LPF stage, should we consider R1 to be 8.45K or 102K? or the parallel equivalent? If we want to strictly follow the standard Sallen Key topology, the 102K shouldn't be there. What is the purpose of having it? and how is it going to affect the cut off frequency that depends on R1,R2,C1 and C2?

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1.) An extra bias voltage is necessary because you are working with single supply only. However, I would suggest to use a split supply (if available) without such external biasing.

2.) For lowpass stages, the resistor between the first node and ground can always be set to infinity (can be removed). This removal is not necessary but this resistor complicates the dimensioning.

3.) The Sallen-Key topology is very sensitive to tolerances of the gain setting resistors. Therefore, it is recommended to use a design strategy based on unity gain values or gain of two (two equal resistors in the feedback path, any values). For this purpose, there are several filter design programs available (online or downloadable).

4.) For a 4-pole filter (as shown in the figure) you need two stages with DIFFERENT pole locations (that means: no identical stages). The parts values, of course, depend on the desired cut-off frequency and the selected approximatioin (Butterworth, Chebyshev,...). Use filter design programs for finding the values.

5.) As it seems, the online program (OKAWA, your link) works for a second-order filter only. Because you need two different stages, you need two different pole frequencies with different Q values. If required, I can give you the values (based on the specification as mentioned under 4.).

UPDATE: As mentioned under 1.) the dc bias of +5V is necessary because the negative supply pin of the opamps is at ground. It is best to use a symmetrical +/-12 volts supply for the opamps. In this case, of course the +5V are not required. Connect this resistor simply to ground. This resistor is necessary to allow a small dc bias current for the opamp input (the value may be larger if you need a larger input resistance of the whole circuit.)

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  • \$\begingroup\$ Thank LvW for your input: 1) The circuit actually uses 2 supply voltages (5V and 12V for the op amp). Is this what you mean? If I remove the resistor between the first node and ground, I'll get a different cut-off frequency. My question is: what is the purpose of this resistor? Why was it put? Thank you again for the help \$\endgroup\$ – Ahmad Aug 12 '15 at 15:21
  • \$\begingroup\$ Ahmad, See my update \$\endgroup\$ – LvW Aug 12 '15 at 15:41
  • \$\begingroup\$ Regarding comment 1 - I guess that is assuming that you have a single-sided input signal? OR would a negative bias-supply of about -0.9V also work? \$\endgroup\$ – cowboydan Aug 12 '15 at 15:48
  • \$\begingroup\$ I see a coupling capacitor at the input. Hence, we have a signal symmetrical to ground. I do not need any external dc bias (why -0.9V ??) in case of symmetrical split supply voltages. \$\endgroup\$ – LvW Aug 12 '15 at 16:18
  • \$\begingroup\$ Thanks again LvW. I see your point now. The circuit is supposed to be powered by two sets of batteries 6v each. I think I can rearrange it to provide -6 and 6 and get rid of the three extra resistors. In this case the other resistors will need to be changed if I need to keep the same cutoff freq. Right? Also, how to calculate the input and output resistance of the entire 3 stage circuit? So that the Rin and Rout remains the same? \$\endgroup\$ – Ahmad Aug 13 '15 at 11:24

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