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I am trying to verify a block I created using Modelsim but am having a little trouble with the clock generation. I would like the testbench to produce a 5ns (200MHz) clock using the code below...

Period:

CONSTANT period : time := 5000 ps;

Process:

-- system clock signal generation
clock_proc : PROCESS
BEGIN
    WHILE (true) LOOP
        clk_i <= '1'; WAIT FOR period/2;
        clk_i <= '0'; WAIT FOR period/2;
    END LOOP;
    WAIT;
END PROCESS;

However, in Modelsim a 4ns period clock is generated. But as all my asserts are based off wait statements like the following...

    WAIT FOR 1 * period;

these still trigger off of the desired 5ns clock. What am I doing wrong in the clock generation? I have tried using 5000ps in case Modelsim can't handle the floating point number generated from 5ns/2 but this produced no difference.

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  • \$\begingroup\$ What is your simulation resolution set to? \$\endgroup\$
    – scary_jeff
    Commented Aug 12, 2015 at 11:06
  • \$\begingroup\$ @scary_jeff I had it set to the default value! Thanks very much. I didn't know you could specify that. \$\endgroup\$
    – Marmstrong
    Commented Aug 12, 2015 at 11:11
  • 1
    \$\begingroup\$ You can shorten your process to this one-liner: clk_i <= not clk_i after (period / 2); or clk_i <= clk_i xor (not stopSim) after (period / 2); \$\endgroup\$
    – Paebbels
    Commented Aug 12, 2015 at 11:58
  • \$\begingroup\$ @Paebbels Doesn't it still require two lines due to the need to specify the initial state? \$\endgroup\$
    – Marmstrong
    Commented Aug 12, 2015 at 12:04
  • 1
    \$\begingroup\$ You can specify the initial state in the signal declaration line: signal clk_i : STD_LOGIC := '0'; stopSim is a nice way to halt (all) clock generation(s) when all stimuli events have been processed. \$\endgroup\$
    – Paebbels
    Commented Aug 12, 2015 at 12:38

1 Answer 1

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It sounds like your simulation resolution is set to 1 ns, in which case any any wait statements will be rounded down to the nearest nanosecond.

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  • \$\begingroup\$ 5.2.4.2 Predefined physical types "It is an error if a given unit of type TIME appears anywhere within the design hierarchy defining a model to be elaborated, and if the position number of that unit is less than that of the secondary unit selected as the resolution limit for type TIME during the elaboration of the model, unless that unit is part of a physical literal whose abstract literal is either the integer value zero or the floating-point value zero." \$\endgroup\$
    – user8352
    Commented Aug 12, 2015 at 11:16

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