I am building a BLDC drive circuit for a 24V/60W BLDC motor. I chose SI4564DY(P+N) and FAN3278 to realize it as shown below (I only include A+ and A-, B and C are exactly the same). The FB indicated at SI4564 output was short-circuited on the PCB using solder during the test. enter image description here

When I tested the circuit using 12V as VCC to drive the motor at low speed, SI4564 became hot very quickly even when the current from DC power supply showed less than 200mA. I checked the gate signals at FAN3278 input (A+ is PWM with 15% duty cycle, A- is full-on) and SI4564 gate input signals AH and AL enter image description here

I noticed that there are rich ripples at SI4564 AH and AL and the minimum voltage at AH is about 2.5V rather than 0V. So my questions are

  1. Does the circuit has any problem? If yes, would anyone please suggest how to change it.
  2. What could be the reason the SI4564 became so hot under such small current?
  3. What could have caused so many rippled on AH and AL? Could it cause any damage to the chip?
  4. Why are there voltage offset (~2.5V) in AH?

This is my first design and I really appreciate anyone's help. Thanks in advance.


Since I can only use two links at this moment, I have to combine several pictures into one. So, to reply to Bruce Abbott for the current issue, I added another picture, marked as Fig 2-4. Fig2-4 is the current sampled by a 0.1 ohm resistor at the lower arm of the bridge to sample motor phase current, and the peak value is 0.23V, which means motor phase current is 2.3A.

  • \$\begingroup\$ One more thing, the PWM switching frequency I used was 20KHz \$\endgroup\$ – roTor-roTor Aug 13 '15 at 6:36
  • \$\begingroup\$ What is the phase to phase terminal resistance of your motor? Can you expand the high-side Gate drive signal to show just a few PWM cycles? How much ripple is present on Vcc? \$\endgroup\$ – Bruce Abbott Aug 13 '15 at 7:07
  • \$\begingroup\$ Get rid of the 100 ohm gate resistors. The CR time for these is 100ns for the N fet and 200ns for the p fet. \$\endgroup\$ – Andy aka Aug 13 '15 at 7:10
  • \$\begingroup\$ @BruceAbbott The phase to phase resistance is 0.5ohms, and the ripple on Vcc is 3.4V peak-peak. The PWM waveform is updated in the original post \$\endgroup\$ – roTor-roTor Aug 13 '15 at 7:54
  • \$\begingroup\$ @Andyaka I thought the resistor in series is to limit ringing effect. I actually tried to use 10 ohms, but it didn't help. The CR time as you pointed out is 100ns and 200ns, but the PWM period is 50us. Will the CR time cause problem in such an ratio? \$\endgroup\$ – roTor-roTor Aug 13 '15 at 7:56

The most common causes of an overheating FET are:-

1. Gate drive voltage is not high enough to turn the FET fully on.

The PMOSFET in the SI4564 only needs 5V to turn on and your driver is supplying ~9.5V, so I don't think low drive voltage is the problem.

2. Gate drive rise/fall times too slow, causing high loss during switching.

Unfortunately your trace is too squashed up to measure the rise and fall times accurately. After counting pixels my guess is ~1us total, with ~0.5us spent in the critical region where the FET is partially turned on. Is this fast enough?

One way to reduce switching losses could be to change the PWM from high-side to low-side. The NMOSFET in the SI4564 has half as much Gate charge as the PMOSFET, so it should switch about twice as fast.

3. Current draw too high, causing excessive I2R loss in Rdson when the FET is turned on, or in the body diode when passing reverse current.

You say the average current draw was 'less than 200mA', but at 15% PWM the peak current will be much higher. If motor resistance and generator back-emf were the only things limiting peak current then it would be extremely high (~40A) but the motor should have significant inductance which slows down current changes.

At 15% PWM the average motor current should be 1/15% = 6.7 times higher than the power supply current. If the combination of motor inductance and PWM frequency is high enough to completely smooth out current variations then peak current will be the same. However at 20KHz there will be some ripple, so the peak current will be even higher. This is important because the rms current will also be higher, resulting in higher loss in FET internal resistances.

When the PMOSFET is turned on motor current flows through its Rdson (~0.017Ω). When the FET is turned off this current recirculates through the NMOSFET's body diode, which drops ~0.7V. Combine those two paths and you may find the SI4564 dissipates significant power despite the apparently low current draw.

Without knowing the actual motor current waveform I cannot accurately calculate the power loss. However to get an idea of what waveform you might be getting, here's a test I did of a commerical brushless ESC running 24KHz PWM. The motor current waveform is a little chaotic due to the analog scope overlaying several sweeps, but its triangular shape is obvious. Note that peak motor current is more than 3 times higher than power supply current (35A vs 10.3A) and this is at ~60% PWM when average motor current should only be 1.7 times higher than power supply current. At 15% PWM the ratio would be much higher.

enter image description here

BTW your power supply ripple is excessive. You should add at least 100uF of low ESR capacitance between Vcc and Gnd.

  • \$\begingroup\$ You are absolutely correct about the current. I added a picture in the original post to show that the peak current can actually reach 2.3A. However, my question is, the heat is supposed to be related with the RMS value of the current, isn't it? \$\endgroup\$ – roTor-roTor Aug 14 '15 at 2:05
  • \$\begingroup\$ You are also right about the on/off time, it is close to 0.5us. However, if you calculate it using Qg/I, SI4564 P-channel typical Qg is 33nC in worst case and drive current from FAN3278 is typically 1A and -0.5A, and you get about 60ns in worst case. Why is reality so far from calculation result? Anyway, I will try to use lower arm PWM and see if it could lead to cooler MOSFETs. \$\endgroup\$ – roTor-roTor Aug 14 '15 at 2:12
  • \$\begingroup\$ There is a 10uF cap between Vcc and Gnd, but it seems not enough. I will try a 100uF one. \$\endgroup\$ – roTor-roTor Aug 14 '15 at 3:13
  • \$\begingroup\$ Heat is proportional to rms current squared, but only in a resistor (eg. Rdson). At 15% PWM I suspect most power loss occurs in the FET body diode - which is non-linear - so you must calculate instantaneous power from voltage*current and average it over the PWM period. My estimate is 100mW loss in the Source-Drain channel (mostly during switching) and 800mW in the FET body diode, for a total package dissipation of 0.9 Watts. \$\endgroup\$ – Bruce Abbott Aug 14 '15 at 4:41
  • \$\begingroup\$ If I add a diode resistor pair as suggested here link, will it help to reduce the switching loss? \$\endgroup\$ – roTor-roTor Aug 14 '15 at 4:56

Correct me if I am wrong...

But this drive has an inverting channel and the inverting channel is driving the Ptype.

From the 1st scope plot it would thus appear that there is large block where the P and the N are gated on

A+ = Hi -> AH = Lo -> Ptype gated

A- = Hi -> AL = Hi -> Ntype gated


  • \$\begingroup\$ I am really sorry, but I used the wrong picture to show A+ and A-. I updated it already in the post and there is no shootthrough. I apologize again for my mistake. \$\endgroup\$ – roTor-roTor Aug 14 '15 at 0:59
  • \$\begingroup\$ That's good :) at least the data is complete \$\endgroup\$ – JonRB Aug 14 '15 at 12:29

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