I working on sam3x8e processor with atmel studio 6.2.

I have configured two gpios for interrupt on falling edge as follows:

pio_handler_set(PIOB, ID_PIOB, PIO_PB3, (PIO_IT_FALL_EDGE ), keyPressHandler);
NVIC_EnableIRQ((IRQn_Type) ID_PIOB);
pio_enable_interrupt(PIOB, PIO_PB3);

pio_handler_set(PIOB, ID_PIOB, PIO_PA4, (PIO_IT_FALL_EDGE ), keyPressHandler);
NVIC_EnableIRQ((IRQn_Type) ID_PIOB);
pio_enable_interrupt(PIOB, PIO_PA4);

one gpio belongs to PIOA i.e PA4 and the other belongs to PIOB i.e PB3.

If I press key connected to PB3 pin I get single keypress event.

If I press key connected to PA4 pin I get multiple keypress events.

I have used all the TC channels. In attached datasheet there is some multiplexing dependency for PA4 and TCLK1.
Can anyone tell me what initialization is to be done for PA4 and TC section so that PA4 work as expected. I have also used timers as below:

Timer0_100msTickTimer.tc = TC0;
Timer0_100msTickTimer.channel = 0;
Timer0_100msTickTimer.irq = TC0_IRQn;

Timer1_KeyboardTimer.tc = TC0;
Timer1_KeyboardTimer.channel = 1;
Timer1_KeyboardTimer.irq = TC1_IRQn;

Timer2_DisplayTimer.tc = TC0;
Timer2_DisplayTimer.channel = 2;
Timer2_DisplayTimer.irq = TC2_IRQn;

Please tell me if you can figure out for any wrong configuration.

Thanks and Regards, Mj


I'm wondering if your code works at all:

pio_handler_set(PIOB, ID_PIOB, PIO_PA4, (PIO_IT_FALL_EDGE ), keyPressHandler);
NVIC_EnableIRQ((IRQn_Type) ID_PIOB);
pio_enable_interrupt(PIOB, PIO_PA4);

I guess you should replace PIOB with PIOA since your GPIO is located in PortA. Also ID_PIOB doesn't sound right. If you post constants, you should post their values, otherwise we cannot really comment on them. Since this sounds like something from the ASF framework, I would guess that this constant is actually correct (or if ID_PIOA would maybe be better), but I cannot say for sure.

Still, this doesn't explain why your code triggers multiple times. I would rather think this is actually a hardware related problem which is named bouncing. You will need to de-bounce your keys to get a solid solution. For an overview of key-debouncing algorithms you might want to check this out.

Do you have the chance to see if this is really a physical issue (bouncing) or a software issue? You might want to monitor the state of the input using a scope to get a reliable answer for this.

  • \$\begingroup\$ I don’t use ASF, but the SAM3X8E PIO supports per-pin debounce; the registers are DIFSR, Debouncing Input Filter Select Register (one bit per pin) and SCDR, Slow Clock Divider Register (I set it to 32768/200 to get 5 ms debounce). Is there ASF support for this? \$\endgroup\$ – Simon Wright Aug 20 '15 at 22:01

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