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This document from TI describes a method to allow use of bootstrapped N-Channel MOSFETS at high duty-cycles, by keeping the bootstrap capacitor "topped up" with an external charge pump, separate from the gate driver IC.

My question is: wouldn't this present a risk of exceeding the Vgs rating of the MOSFET? For example, say the maximum gate-source voltage on a FET is 16V, and it is being used as a high-side switch on a 12V load. Your average gate driver IC will (approximately) double the 12V to 24V, leading to a Vgs of 12, within the FET's rating. Say one now connects a constantly-running voltage doubler to the high side of the bootstrap capacitor. Now instead of the bootstrap mechanism doubling the 12V, it will double the 24V coming from the external doubler, leading to a Vgs of 36V.

Is this the case, or am I misunderstanding something? Is there an easy way to mitigate this? The only thing I can think of is disabling the charge pump whenever (probably slightly before) the high-side switch turns off, which sounds like a pain.

schematic

simulate this circuit – Schematic created using CircuitLab

(Note that the gate driver I am working with has the bootstrap diode built-in, hence its absence form the schematic)

If it helps, here are the specific parts I'm hoping to use:

(Yes, this is for an H-bridge, not just a high-side switch. I am just confused about the bootstrapping part of it.)

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  • \$\begingroup\$ Another possible solution I thought of is to disconnect C1 from M1's source, and relying on the charge pump alone to supply the voltage. But then I lose the advantage of the gate driver IC's high peak current drive to rapidly charge the gate, right? Also I don't know if the IC's internal circuitry depends on this being connected \$\endgroup\$ – dn3s Aug 20 '15 at 22:55
  • \$\begingroup\$ I can't seem to edit my comment. I meant to say disconnect C1 from M1's source and instead connect it to ground. \$\endgroup\$ – dn3s Aug 20 '15 at 23:13
  • \$\begingroup\$ eh? not quite. The doubling works by adding 12V via C1 to V+ (via the internal diode seen on Fig 4 of MIC4606 datasheet. With the charge pump at 24V you'd add 12V from C1 to 24V, for 36V total,24V Vgs (- losses). \$\endgroup\$ – Brian Drummond Aug 21 '15 at 0:04
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A bit of housekeeping: The charge pump controller you found (LM2767) is only good up to a VCC of 12V. I did some quick searching, and I wasn't able to find one that works. But that's a minor detail, I'll move on to your main question, assuming that you can generate that 24VDC.

If you have 24V available as drawn, the gate driver and top power MOSFET will be in a race to see which blows up first. Your gate is rated for 20V, and your gate driver is rated for 16V, meaning the first time the high-side device turns off, the gate driver will blow. If the gate driver doesn't blow, then the gate will as soon as the gate driver puts the full 24V on to the gate.

My first question back to you is "Are you really sure you need a boost to your bootstrap capacitor?" Looking at the MOSFETs, you don't see a significant decrease in Rds(on) above 7V, so lets see how long it takes to go from your fully charged bootstrap voltage down to 7V (and you can calculate for lower as necessary). From your gate driver datasheet, the quiescent current is 35µA at 12V nominal, resulting in \$35\mu A=C\dfrac{5V}{t_{on}} \$ or \$t_{on}=C \dfrac{5V}{35\mu A}\$ which comes out to about 142 ms per 1 µF of capacitance. If you're holding the voltage high for a long period of time (multiple seconds), then a boost is necessary.

Since you only need a bit of current, you might be able to put a resistor (e.g. 100kΩ) in series with your 24V source, and a 12V zener diode across your high-side FET.

Another option is to have a high-side PNP set to switch on when your output is high.

Another option may be to have a small boost converter (charge-pump or inductor) that is enabled when the output is high.

The easy way to "just handle" this problem is to get an isolated DC-DC converter to provide a dedicated high-side source, though that is also the most expensive option.

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  • \$\begingroup\$ I am not trying to reduce Rds(on). I am trying to make the high-side MOSFET stay on indefinitely (or for high duty cycles), so I will need some sort of external "pumping" mechanism to keep the bootstrap capacitor charged in that case. \$\endgroup\$ – dn3s Aug 21 '15 at 1:05
  • \$\begingroup\$ reading over your answer more carefully now. I didn't realize bootstrap capacitors could last that long. I had hoped to be able to enable the high-side switch indefinitely, but having to briefly pulse off every 100ms or so is definitely acceptable in my application. thanks! \$\endgroup\$ – dn3s Aug 21 '15 at 1:43
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    \$\begingroup\$ @dn3s Regarding the reduction of Rds(on), that was just an assumption made to pick an acceptable voltage drop on your gate drive capacitor. You can't go too overboard with capacitance, you definitely need a good (e.g. ceramic) capacitor for your bootstrap. \$\endgroup\$ – W5VO Aug 21 '15 at 2:43
  • \$\begingroup\$ good to know. I can be a bit sloppy with these calculations, so should say 10uF be safe? \$\endgroup\$ – dn3s Aug 21 '15 at 3:29
  • \$\begingroup\$ @dn3s Looks reasonable for about 1s. You should be able to get ceramic 10µF caps at 25V fairly easily \$\endgroup\$ – W5VO Aug 21 '15 at 4:45
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The TI application note addresses the issue that "self-pumped" bootstrap circuits have an upper limit for duty cycle, because the high side bootstrap capacitor needs time to recharge. So, a separate charge pump is added, which takes over from the bootstrap circuit.

enter image description here (also fig.4 in the app note)

The concern about exceeding the voltage rating for VGS is a valid concern. The gate of the MOSFET is may see the charge pump voltage when D < 1. Notice that the charge pump doubler in the app note is powered from the +3.3V output, so it generates a modest voltage.

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