I have a simple problem in simulating my circuit. First I will post all the details, Schismatic and netlist, then I will talk about the error and its options. I am using Cadence Orcad 16.6 Pspice and simulating a simple circuit the schematic along with simulation setting is given below. enter image description here

The schamtic is very simple. I am giving input sine wave to my device and it has two output ports. The first is "N". Which I modeled using a voltage controlled voltage source. Before Going further, I will upload the netlist file I have written and integrated with the circuit.

.SUBCKT mem cap n vg  
.PARAM p1=1, p2=-2, p3=3, p4=4, 
+ epsilon0=8.85e-12, d_mos=0.65e-9, epsilon_mos={5*epsilon0}, 
+ d_g=30e-9, epsilon_g={19*epsilon0}, vt=-1, e=1.6e-19, 
+ u=30, h=1.05e-34, weight=0.70,c_g={epsilon_g/d_g}, c_mos={epsilon_mos/d_mos}, 
+ c_t={1/((1/c_g)+(1/c_mos))},

.PARAM n_initial={((c_g*(-vt))/e)*0.0001},

En n 0 VALUE={(n_initial)}
.ENDS memcapacitor

Now the netlist is really simple...There is the parameter "n_initial" the value of which is calculated on the basis of previous parameters.When I calculated it value, It is equal to in the order 10^12 . Now I just want to output this n_initial value at the output node "n". This is constant value of the order 10^12 and it is not dependent on any input voltage .Its just a simple constant value calculated based on the previous parameters.

Issue: When I simulate this code, I get error given in the pic below, i.e Convergence issue in transient analysis. Convergence problem in transient analysis

I used almost all the techniques used in the file attached, i.e GMIN stepping and simulation option setting , change in number of iterations etc. But couldn,t solve the issue. Option: Then I changed the value of n_initial and reduced it to by using larger vale of "e" which is in the denominator. I used e value in the power of 10^-12 instead of 10^-19 and it worked. Conclusion: I concluded that problem is in the n_initial parameter value. If I increase this value and assign it to some node, It gives me error . When I reduce its value, It works just fine. Kindly give me suggestions. Thanks in advance. Note : if you need any other info, I will provide it happily. I can send all my file to anyone who will help me solving this problem.


1 Answer 1


Although this is an old question. It would be worth noting that there are 3 things going wrong here. Firstly, ITOL should be lowered to be 1/10 of your lowest current, as well as IREL. This makes things take longer, but you need to have enough resolution for convergence. The biggest change should be to set the simulator to use the "Gear" method for convergence instead of trapezoid. What I believe that you have is something that is not converging with trapezoid due to resolution.


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