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I'm trying to make a circuit where closing a switch will change a GPIO from low to high, and I want to minimize current as much as possible to increase battery life. The chip I will be using is Nordic Semiconductors nRF51422 (https://www.nordicsemi.com/eng/Products/ANT/nRF51422).

My understanding of pull up and pull down resistors is that they limit current, protecting the chip and decreasing power usage, while still keeping the GPIO either pulled up or pulled down. Having too large of a pull up/down resistor increases the time constant of the circuit making transitions from high to low slower and 'pushes' the GPIO out of the range where it is recognized high or low.

The exact set up I was envisioning was this. I use a very large pull down resistor (on the order of mega Ohms). The voltage drop across this resistor will be so large that it will essentially behave as a pull up resistor with the added benefit of exceptionally small power usage. I then have a switch that when closed connects the GPIO to ground across the recommended size resistor (13 kOhms). The circuit diagram would then resemble a GPIO connected to ground across two parallel resistors, one very large and one much smaller, which will behave like a single smaller resistor Thus, when the switch is closed the digital value of the GPIO changes from high to low, and when open there is only a small trickle of current which saves battery life immensely.

Would that work? In particular, does my idea with the large resistor even make sense?

EDIT:

I'm gonna rephrase my question and add a schematic.

So my understanding is that GPIO's have high input impedance hence a very small leakage current when connected to ground. If I were to connect a resistor that had a impedance of, say, 10 times the input impedance of the GPIO between the pin of the GPIO and ground would the GPIO pin be at 0.9*VDD? I'm assuming the input impedance of the GPIO is independent of what is connected to it.

I've made a schematic that illustrates what I'm thinking by simplifying the GPIO as a black box resistor. Schematic

Would this work? Is my schematic just straight up wrong?

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    \$\begingroup\$ Why not use a SPDT switch? \$\endgroup\$ – Ignacio Vazquez-Abrams Aug 23 '15 at 21:15
  • \$\begingroup\$ I'm envisioning a pair of gloves where each finger tip has some kind of conductive surface. There are 4 lines out (the fingers) and one line in (the thumb). I can close the switch by touching the thumb to the fingers. Each finger is connected to a GPIO on the µC so I can tell which finger(s) are being touched by the thumb. Maybe I'm making this more complicated than it needs to be, but I want it to use the smallest amount of current possible. \$\endgroup\$ – Alex Aug 23 '15 at 22:27
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Thus, when the switch is closed the digital value of the GPIO changes from high to low, and when open there is only a small trickle of current which saves battery life immensely.

You have the wrong idea. A pull up should not result in much current aside from the leak current of the gpio

schematic

simulate this circuit – Schematic created using CircuitLab

In the first picture, a pull up pulls the GPIO IN high. The only current is the leakage current required to measure the voltage input level. This is a few nA, a fraction of a milliamp. This can most often be checked as Input Logic High/Low (ILH, ILL) in a datasheet but I can't find it in your product. Assume 10nA or less on average.

It's only in the second picture that a significant current can be drawn. When the button is pressed, there is a straight path from V+ to Gnd, through R2. Assuming 3.3V, that's 3.3V / 47000Ω = 0.00007A It's 70000 nA. Which looks large in comparison, but that's still only 0.07mA or 70µA.

The significant current draw is only when the button is pressed. So simply design your circuit so the default state of the button is where the button is open.

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  • \$\begingroup\$ This makes sense and is probably what I'll end up doing. In my application the switch will be closed fairly often, and I was trying to find a way to bring the current while the switch is closed down to single µA's (it'd be about 250 µA with the recommended 13 kΩ resistor). Honestly though, this is hardly anything compared to what it takes to run the chip. I was just trying to find a way to really skimp on energy usage here. \$\endgroup\$ – Alex Aug 24 '15 at 2:58
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The exact set up I was envisioning was this. I use a very large pull down resistor (on the order of mega Ohms). The voltage drop across this resistor will be so large that it will essentially behave as a pull up resistor

This doesn't make a lot of sense. If you hook the resistor from the pin to ground it's a pulldown. The voltage at the pin is the same as gnd. By ohm's law, there is very little voltage drop across the resistor because such a small amount of current flows.

A typical configuration is shown below.

I don't really understand your idea, to be honest. It sounds like you're trying to have a big resistor that's both a pull up and a pull down, then connect a smaller parallel with a switch? I'd need a schematic to comment further, but you really only need the standard pull up or pull down configuration. For a pull up, swap the position of the resistor and button.

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ (1) My understanding is (from this) that GPIO's carry current. Thus, when you place in a pull down resistor the GPIO is at a voltage above ground that is equal to the voltage drop across the resistor. The source above seemed to imply this current was constant regardless of resistor value. My idea was to use an unusually large resistor and the voltage drop across the resistor will be so large that the GPIO will be at or near VDD even though its a pulldown resistor. \$\endgroup\$ – Alex Aug 23 '15 at 22:01
  • \$\begingroup\$ (2) In the above source an example value for this current is given as 1 µA, so a 3 MΩ resistor placed between ground and the GPIO would put the GPIO at 3 V. When the switch is closed you would end up with a 13 kΩ resistor and a 3 MΩ resistor in parallel which has an equivalent resistance of about 13 kΩ, which is exactly the rated resistance for the pull down resistor. schematic \$\endgroup\$ – Alex Aug 23 '15 at 22:05
  • \$\begingroup\$ No, that's not how it works. Putting a resistor between gpio and gnd is like putting a wire between gnd and gpio. If the amount of current drawn by the gpio is nearly constant, that doesn't imply that the current passing through the resistor is constant. A large pull up or down resistor just means that when we close the button, the new current flowing from the source is lower. It also means that we are more susceptible to noise. You can't just put arbitrarily large resistors and expect it to change how ohms law works. \$\endgroup\$ – RYS Aug 23 '15 at 22:58
  • \$\begingroup\$ I sort of understand. Those examples were referring to a situation where we were pulling up the gpio, and I assumed it would be the same for pulling down a gpio. I'm still confused by your statement that although the current drawn by the GPIO is constant the voltage across the resistor need not be constant. If the resistor and GPIO port are in series then how can the current not be constant through the resistor? \$\endgroup\$ – Alex Aug 23 '15 at 23:37
  • \$\begingroup\$ well, they're actually not in series. you can look up some schematics to see how GPIOs are put together, maybe it will make a little more sense. I don't think i said that..my question to you is, how do you expect to change the resistance and and keep the current passing through the resistor constant? That's just not gonna happen with a constant source. It sounds like you have some fundamental misunderstandings with some topics in basic analysis. Maybe review some good sources on the topic. \$\endgroup\$ – RYS Aug 24 '15 at 1:50

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