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One of my previous classmates said "Low Drop Out regulator has a minimum load requirement and this is related to stability. It might affect start up overshoot." In the previous school project, my LDO, designed to produce a 1.8V regulated voltage, has a 0.6 V start up overshoot and that was the advice he gave me to improve my schematics by adding a resistor in parallel to my load to achieve some minimum load current even in zero load condition. It didn't improve anything though. He didn't explain further as he was in a rush then.
Today I recalled that statement and tried to search such statements on Internet and find a couple similar statements without explanation. I couldn't find that freindly classmate again as he graduated. Could someone give a detail explanation to me how does the relations of minimum load current and stability hold true?

The LDO schematics: NMOS pass transistor

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In the design you show, the gm of the output stage will be dependent upon the load current and so will affect the loop gain and potentially stability. Providing a minimum load will reduce the variation in gm and allow a better compromise in the feedback compensation.

Why do you have a capacitor to ground at the output of the amplifier - that will tend to make stability worse by introducing a pole in the transfer function.

Many voltage regulators have minimum load constraints for a different reason. Three pin regulators such as LM317 intentionally divert most of their internal operating current to the output in order to keep the current into the adjust pin constant. This means that if the output current falls below the operating current of the internal circuitry LDO will lose control and the output voltage will rise.

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  • \$\begingroup\$ Don't know how you ended up with "willies" in the last sentence there!! Is it supposed to read will lose? \$\endgroup\$ – stefandz Aug 30 '15 at 10:06
  • \$\begingroup\$ *&^% autocorrect... \$\endgroup\$ – Kevin White Aug 30 '15 at 16:19

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