Here's your circuit:
simulate this circuit – Schematic created using CircuitLab
Please note that since the high side mos are P mosfets they are on when the input is low.
How did I draw that? First of all you need to fill the truth table, then you build the pull down network, i.e. the NMOS part, and the pull up network separately.
Let's make the table:
A B F
0 0 1
0 1 1
1 0 0
1 1 1
Inspecting the table you can see that the output is low when A=1 and B=0. Your pull down network will consist of two series (logical AND) transistors, one connected to A, the other to /B.
The output is high if A=0 or (A=1 and B=1). Note that here I have already simplified the formula (search for karnaugh maps, minterms, maxterms, product of sum, sum of product).
Your pull up network will consist of the parallel (logical OR) of:
- the series (AND) of two transistors, one connected to /A, the other to /B
- a single transistor connected to A
Note that i inverted the signals for the pull up network because P mos turn on when input is LOW.