I am working on modifying SG acoustics SGA-SOA-2 op-amp. The goal is to make it work on 32 \$ \Omega\$ headphones load, and use more common transistors.

What I did was:

  1. Replaced all transistors with common SMD ones with highest gain (BC847C/BC857C).
  2. Re-tuned currents for lowest distortion and input offset voltage. Returned C2 for frequency compensation due to much faster transistors and higher op-amp gain.
  3. Removed protection diodes
  4. I figured out that original design(with transistors replaced ) had visible harmonics when working on 32 \$ \Omega\$ load (~ -80dB), I replaced output stage with compound transistors. I was also trying to design MOSFET power stage, but harmonics were terrible (~-60dB), probably due to huge crossover, which feedback was not quick enough to fix. Another option was to add extra BJT power stage, but final performance was about the same as compound version.
  5. Reduced resistance of R10 and R11 to 1 \$ \Omega\$, original 4.7 \$ \Omega\$ ones were causing harmonics.
  6. Removed 10 \$ \Omega\$ resistor between C4 and C5. Not sure why it was there.

Here is what I've got at the end: enter image description here Simulation on 1kHz sine shows that 1st harmonic is at -124dB, second at -135dB.

The questions are:

  1. What is more adequate model for headphones? I currently use 32ohm resistor, but I feel this is far from reality.
  2. What is the purpose of R7, R10 and R11 resistors? On simulation results stay the same if I remove them.
  3. What is the purpose of C1/R8?
  4. Is there something in this circuit which will make it performance much worse when implemented in real world (target application - 32 \$ \Omega\$ headphones amplifier)?
  5. Are there some transistors which have significantly better performance for this circuit? Lower noise for example... I was thinking about also common SS9014/SS9015 - but not sure they are any better than BC847C/BC857C for this application.
  6. While performance with feedback seems to be ok, when feeding small signal (1mV) with no feedback I see that amplifier is highly non-linear. Is it beneficial to make it more linear in this configuration?
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    \$\begingroup\$ Generally I find that when you want a discrete component amplifier, then it makes more sense to design one, than to rebuild an opamp where you don't need half of its functionality \$\endgroup\$
    – PlasmaHH
    Commented Sep 1, 2015 at 10:33
  • \$\begingroup\$ @PlasmaHH I am not that hardcore at the moment :-) \$\endgroup\$ Commented Sep 1, 2015 at 10:37
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    \$\begingroup\$ This is the kind of stuff Douglas Self (an engineer and author) writes about. You may want to find some of his writings and study them. They are not super hard-core, and would definitely help you in a practical way. Replace R3 and R4 with a current mirror. I don't understand why you have L1 there. That does not look familiar. With no load, what is the current through R10 and R11? For a 32 Ohm load, I would not think you need the darlington-like output arrangement. Maybe just try using a single NPN on top and a single PNP on bottom at the output. Good luck! \$\endgroup\$
    – user57037
    Commented Sep 1, 2015 at 16:10
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    \$\begingroup\$ Re: item 6 - That 100 ohm was intended to decouple the output stage from the driver stage, in order to prevent voltage drops on the output transistors from feeding back to the lower-level stages. I'd recommend putting it back, although a 10 - 22 ohm resistor might be better considering your higher current levels. There should also have been a matching resistor on the + side, connecting C3 to another cap. \$\endgroup\$ Commented Sep 1, 2015 at 22:13
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    \$\begingroup\$ Anyone understand what L1 is meant to do? \$\endgroup\$
    – Andy aka
    Commented Sep 3, 2015 at 16:17

3 Answers 3

  1. A resistive load is not a bad model for headphones. If you wanted to be pedantic, you could add inductance for the speaker coils and parasitic L, C, R for the cabling, but a simple resistor is okay. I would look up the impedance your headphones and use the manufacturer supplied impedance.

  2. I would consider R10 & R11 as a form of current limiting. Here's why. (I'm using the reference designators of the SGA-SOA-2 original schematic on sg-acoustics for this question, assume reference designators according to your schematic for the rest) The branch formed by Q6 & Q7 is the output stage of the op-amp. We know V_be6 + V_R10 = V_d5 + V_d6. V_d is related to the diode current in a logarithmic relation, and thus V_d5 + V_d6 will not change appreciably. Thus we can say V_be6 + V_R10 = constant. Thus at high output currents, R10 will take the voltage drop and decrease V_be6, thus limiting the amount of current that can flow through the output stage. This is good for protecting against short circuits. That's my guess anyways, it is a bit strange for short circuit protection, typically we see another transistor monitoring R10 and then shorting out V_be6. See (http://users.ece.gatech.edu/mleach/lowtim/prot.html, figure 3).

  3. R8 implements Emitter Degeneration. There's a lot to be said on this topic, searching for common emitter with emitter degeneration will generate a lot of resources. The high level idea is we use R8 to set the bias current of the transistor because without it, the gain of the common emitter amplifier (Q7) is very sensitive to V_be7 and makes it difficult to break into large signal & small signal models. So R8 stabilizes our amplifier, but it also kills our gain. The voltage gain of the emitter degenerated common emitter amplifier is -R_C / R_E where R_C is the collector resistance and R_E is the emitter resistance. You can see that as R_E increases the gain decreases. This is bad as this amplifier stage provides the majority of the op-amp gain. In order to fix this, we use bypass capacitor C1. Capacitors have impedance 1 / (jwC) so at low frequency, it has very high impedance and at high frequency, there is low impedance. Let's just examine the DC (biasing case). At DC, C1 has high impedance and the parallel network C1 || R8 is approximately R8. So at DC, we still have all the benefits of emitter degeneration (basically helping us bias the transistor). At high frequency, we want to have large gain. In this situation, C1 || R8 is now dominated by C1 which has low impedance and C1 "bypasses" or shorts out R8. Now we are back to our standard common emitter amplifier which has much higher gain than the emitter degenerated version. Basically C1 makes the gain of the amplifier frequency dependent so we get both large gain at high frequency and nice biasing of the transistor.

  4. Not really, you should expect comparable performance since you are using actual models and not ideal components. I've built discrete op-amps before and they typically match within 10% of simulation results.

  5. Yes, certain transistors probably have better noise figures, but I'd be hesitant to say that the transistors themselves are the source of the harmonics instead of the design of the amplifier. I would carefully look at the biasing of the circuit before trying to use better transistors. Remember that if we break our small signal model assumption, we can't assume linearity over the amplifiers. Make sure each of your stages is linear over the range that you expect. Disconnect the output stage and ensure the diff pair + C-E is linear and remember that the input signal must be really small in order to meet your small signal assumption in open loop. Typical op-amp gain might be > 10^4. That means even a 1 mV signal would be amplified to 10 V swing. Test the diff pair & C-E open loop, verify linearity. Crossover distortion should be almost definitely eliminated by the op-amp feedback. If it isn't, then the op-amp gain isn't large enough.

  6. Open loop measurements of op-amps are difficult because of the large gain. I would even try going lower to 100 uV. We can only expect linearity if our small signal models are valid, meaning the perturbations around the bias point is small enough that we can linearize. Reiterating what I said for question 5, check the linearity of each stage independently, the diff pair, C-E and output stage. The may mean creating bias circuitry to test each stage separately. If you are running into power rail saturation (running against 18, -18 V), probably check the biasing of the amplifiers to ensure there is enough voltage headroom at the output to allow for swing. If you see distortion, make sure small signal is still valid. Lastly, check the datasheets and make sure you're not running up against any current constraints. These could be in the BJT or part of our design as seen by the current limiting for R10, R11.


R7, R10, R11 are for thermal stability. They add a little emitter degeneration, so gain is dependent on characteristics of a resistor (stable over temperature) rather than a BE junction voltage (changes a lot with temperature).

I would expect R8 to perform a similar function, linearizing Q7. Except that it is bypassed by C1, which removes the effect at higher frequencies. Maybe it's just a frequency response tweak? Q7 is the voltage amplifier and contributes a lot of distortion. I think Douglas Self has written about this.

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    \$\begingroup\$ R8 reduces gain, slightly. Bypassing R8 at high frequency would provide higher gain at those frequencies. May help compensate for beta loss at higher frequencies. But the time constant is 68 ns (2.3 MHz cutoff). \$\endgroup\$
    – user57037
    Commented Sep 3, 2015 at 17:50

This may not be an answer to your 6 questions, but if you want to improve your design, the most obvious structural thing to do is replace R3 and R4 with a current mirror. This will dramatically improve the input stage and all you need to do is add two transistors. If you cannot explain the purpose of L1, you should consider removing it, too. At least see what happens in simulation when you do so.


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