This is a carry look ahead adder :

enter image description here

This adder is known to calculate one or more carry bits before the sum. From the figure we see that carry look ahead block calculates the carry C1,C2,C3,C4 . But i don't understand how does it do that ? How does this block calculate the carry before the sum ?

  • \$\begingroup\$ there aren't reasonable tags present here \$\endgroup\$ – Suhail Gupta Sep 1 '11 at 13:42
  • \$\begingroup\$ Write down the truth table for the carry look ahead unit, then try to find a simple circuit. Start with 2 or 3 bits to simplify it. \$\endgroup\$ – starblue Sep 1 '11 at 17:07

That diagram doesn't show the actual carry logic. To see how it works you have to examine that in detail.
The carry logic in a look ahead adder is built so it does not have the intrinsic delay associated with a ripple carry adder, where each carry output is input to the next partial adder stage.
In a carry look ahead adder, the carry logic is calculated at the same time, based purely on the inputs. So all the carry signals are generated at the same time, rather than waiting for the previous stages carry calculations to propagate (ripple) through. This requires quite a bit of extra logic, but is obviously a lot faster. It's a bit similar to how ripple counters can be improved.
The diagram on page 2 of this document shows the difference between the two carry logics, and this page has an excellent treatment of the subject also.

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  • \$\begingroup\$ The diagram on page 2 explained everything ! \$\endgroup\$ – Suhail Gupta Sep 1 '11 at 15:25
  • \$\begingroup\$ Sadly both links are now dead. \$\endgroup\$ – Pharap Aug 30 '16 at 1:36

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