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I'm trying to generate several waves using a Mojo-V3 board, that has a Spartan-6. I use DDS method to generate the waves. The description of the hardware is in VHDL. At the output of the FPGA there is R-2R DAC to convert the data to analog values. I have no problem with sine wave, but, when I generate Triangle wave, the osciloscope show me peaks when the wave reaches the highest and lowest values. I think the problems are the harmonics, can you confirm that?. At the output of the DAC there is no filter. I use the 20Mhz Bandwith filter and the peaks are lower, but it still appearing in the wave. How can I fix that?

enter image description here

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    \$\begingroup\$ This has gotta be a bug in the code; Zoom in on the glitch. No BW limit. \$\endgroup\$
    – Dzarda
    Sep 9, 2015 at 20:29
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    \$\begingroup\$ Are your outputs registered ? Do you have constraints on the outputs propagation time ? \$\endgroup\$
    – Grabul
    Sep 9, 2015 at 20:36
  • \$\begingroup\$ Zoom in and see if the value changes are of the size of your clock, if they are, then the problem is in your code. Also, simulate your design and check the output of your design in the simulator, see if the results are similar to the one you are getting here. \$\endgroup\$
    – FarhadA
    Sep 10, 2015 at 10:09
  • \$\begingroup\$ I don't have any constraints on the output propagation time. I will try doing zoom and watch if is the same size. I simulate the VHDL code but it seems to be fine. The function increments up to 65535 and then decrements up to 0. I will keep looking \$\endgroup\$ Sep 10, 2015 at 13:11
  • \$\begingroup\$ It looks like you also have a glitch at the zero crossing. This definitely looks like a timing constraints/output register issue. \$\endgroup\$ Sep 10, 2015 at 21:18

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if it is a bug ,you will probably see it when analysing the frames in Chipscope .

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