I was reading my physics book and found a description of mosfets that was different than the one I'm used to. Here is the picture from the physics book: enter image description here

In summary the physics book describes it's operation as this:

  • Gate = OFF = No potential difference applied to gate. This allows electrons to drift through the n channel (which is already there at the beginning). Current is maintained because of applied potential difference between source and drain.
  • Gate = ON = Potential difference is applied to the gate, in such away that repels the electrons in the n channel into the p substrate. This reverse bias causes the depletion zone between the p-n junction to increase, causing the n-channel to decrease, and the current to stop due to a low amount of charge carriers.

mosfet that I'm used to (taken from a digital design book)

enter image description here

  • Gate = OFF = No current due to no conduction path.
  • Gate = ON = Electrons attracted to the gate, forming a n channel path for electrons to drift through, so current flows.

Your physics book example is that of a depletion-mode MOSFET, as evidenced by the phrase "This reverse bias causes the depletion zone...".

Your digital logic example uses the more familiar enhancement-mode MOSFET.

For a very quick discussion of the differences, see https://en.wikipedia.org/wiki/Depletion_and_enhancement_modes

  • \$\begingroup\$ Nice, I was looking for the vocabulary because neither book mentions "depletion" or "enhancement" modes. Thanks. \$\endgroup\$ – Michael Sep 10 '15 at 2:32
  • \$\begingroup\$ @Michael - but also note that the first example also has a built-in n-type channel between the drain and source, while the second has only the substrate. \$\endgroup\$ – WhatRoughBeast Sep 10 '15 at 3:35

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