1
\$\begingroup\$

I have designed a Xilinx Spartan-6 PCI card with SPI configuration interface (please check Figure 2-12 of ug380.pdf user guide). I can program the serial flash through JTAG cable, I can also modify/program the serial flash through the PCI bridge chip, for field upgrade purposes. Unfortunately I forgot to connect one of the GPIO pins from the PCI chip to the FPGA's PROGRAM_B pin, now I have to power cycle the computer to restart the configuration.

Is there a way that FPGA firmware can "FORCE" the configuration process without external assertion?

\$\endgroup\$
  • 1
    \$\begingroup\$ Maybe the ICAP interface will let you do it? xilinx.com/support/documentation/user_guides/ug380.pdf search "Internal Configuration Access Port" \$\endgroup\$ – Some Hardware Guy Sep 11 '15 at 21:16
  • \$\begingroup\$ @SomeHardwareGuy: thanks for your advice. I implemented the logic and it's working just fine. I had to accept the answer from alex.forencich as he posted his notes in the answer section. Thanks! \$\endgroup\$ – Ali Oct 8 '15 at 20:31
1
\$\begingroup\$

This question has been stuck in the back of my head for a while and I just stumbled across the answer in the Virtex 6 configuration guide and then cross-referenced it to the Spartan 6 configuration guide. See the IPROG reconfiguration section in UG380 on page 128. This page includes the sequence of words to write to the ICAP_SPARTAN6 interface to emulate a PROGRAM_B assert from user logic. This is designed for re-starting configuration with a different base address if you have multiple FPGA images stored in the same flash chip. I will reproduce the sequence here for posterity:

  1. send sync word
  2. program GENERAL1,2 and GENERAL3,4 registers with new bitstream address + flash read opcode and 'golden' bitstream address + flash opcode.
  3. send IPROG command

It may be possible to skip step 2 and just send the sync word and IPROG command to use the default values for the start addresses.

Byte sequence:

FFFF dummy word
AA99 sync word
5566 sync word
3261 write GENERAL1
XXXX start address [15:0]
3281 write GENERAL2
XXXX opcode and address [23:16]
32A1 write GENERAL3
XXXX start address [15:0]
32C1 write GENERAL4
XXXX opcode and address [23:16]
30A1 write CMD
000E IPROG
2000 NOP

You might be able to get away with:

FFFF dummy word
AA99 sync word
5566 sync word
30A1 write CM
000E IPROG
2000 NOP
\$\endgroup\$
  • \$\begingroup\$ it's funny, I was reading that document half an hour ago and right now I'm in the middle of implementing the same thing. Thanks a lot, I'll let you know how it goes. \$\endgroup\$ – Ali Sep 21 '15 at 22:06
  • \$\begingroup\$ Good to hear. Did you end up using the short sequence, or did you have to use the longer one? \$\endgroup\$ – alex.forencich Oct 8 '15 at 20:41
  • \$\begingroup\$ I tried to strip down some of the steps from the longer one. I can only recall that your suggested short sequence didn't work, a couple of more steps had to be included but I decided to implement the whole thing in case I need it in future. \$\endgroup\$ – Ali Oct 8 '15 at 20:57
  • \$\begingroup\$ Hmm, that's interesting. Nice to know it works, though. \$\endgroup\$ – alex.forencich Oct 9 '15 at 6:08

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.