# Output of diode clamper circuit for a sinusoidal wave input

I have seen a common explanations of clamper circuit shows in figure and have doubt in that. Here is the two explanation:

1. As RC >> time period, the capacitor charges immediately within no time to Vm. In positive half cycle the diode is forward biased (short ckt) and so, the output voltage is zero. During negative half-cycle the diode is reverse biased (open ckt) and so, the output is (Vin - Vc), which in this case is (Vin - Vm). Hence, the output voltage appears as shown in figure.

Doubt: (i) If the capacitor charges immediately then it will supply a constant voltage of –Vm to diode which will keep it in reverse bias always. Which violates the output waveform shown.

(ii) However, if the capacitor charges to peak value of input i.e. at π/2 and then when the input voltage goes below peak value, diode becomes reverse biased and remains like that until input waveform goes above zero at 2π and diode becomes forward biased again. Even in this case the output voltage should remain zero from 0 to 2π.

Where am I getting it wrong? Can someone give a point by point explaining when the diode will be forward biased and reverse biased and what will be the output voltage during that time.

• Where did the pictures come from - they don't look very accurate. Sep 12, 2015 at 9:22
• I made those pics. please correct them if they are wrong. Sep 12, 2015 at 10:21
• You are asking a question right? The question relates to not understanding some pictures that you drew, right? I'm pointing out that the pictures are inaccurate so.... what else is there to talk about or do. Maybe try finding a site that supposedly explains clamps and then tell what it is you are having problems with on these circuits. Sep 12, 2015 at 10:29
• Sorry! I have corrected the picture. The explaination mentioned in circuit is given in some standard textbooks and websites. But I have a problem with that explaination which I have pointed out in question. Sep 12, 2015 at 11:52

that until input waveform goes above zero at 2π and diode becomes forward biased again.

If the capacitor is charged with Vm the diode does not become forward biased again until almost (3/2)π, to replace the charge that has leaked off through the resistor. If the RC time constant is much longer than the period then that will be close to (3/2)π and the diode only conducts briefly at the positive peaks after initially charging.

Note that this is assuming an ideal diode - a real diode has a significant voltage drop relative to your 2V peak signal.

• Considering RC >> time period of wave. Does the capacitor charge to 'Vm' as soon as the circuit is turned ON or will it charge to 'Vm' at π/2 when Vi = Vm ? Sep 12, 2015 at 11:56
• Assuming the capacitor is not charged, and the signal is 0 before t=0, the capacitor charges from 0 to Vm during the entire time 0 to pi/2. The charging current follows a cosine curve (time derivative of input voltage) so it is maximum at t=0 and 0 at t=pi/2. Sep 12, 2015 at 12:01
• So, during 0 to π/2, output voltage should be zero. Am I right? But in most standard textbooks it is rising from -Vm to 0. Also, will the diode be off as soon as input signal goes below Vm at just after π/2 ? Sep 12, 2015 at 12:06
• Yes, you are right. I made an assumption about the initial state of the capacitor - they can make a different one (assuming it is already in steady state). Yes the diode is off almost all the time, only on just before each positive peak, and off immediately after the peak. Sep 12, 2015 at 12:11
• So, how do you think our output waveform should be? Sep 12, 2015 at 12:14