Sometime ago I had to implement an on-chip (CMOS 65nm) low-pass filter (first order) with very low cutoff frequency (lower than 100mHz). I used PMOS pseudo resistors and momcap, and had to check all the corners to make sure the cutoff freq is low enough. Obviously the output of this filter feeds the gate of another MOS transistor. However, the PDK did not include the gate leakage current, so I used IO devices with large Vth (and other tricks to solve the voltage headroom issues) in the hope of lowest possible leakage current. But that didn't help much and the DC voltage drop across the pseudo resistors made serious issues.
I'm just wondering if someone has experience designing on-chip, very low frequency, filters where leakage current is present in the process.