# Low voltage cutoff circuit with USB reset

I am currently trying to design a circuit for a low voltage cutoff. Once the voltage dropped below a certain threshold it should stay low. When a USB-cable is attached it should reset and start watching the voltage again when the cable is removed.

V+ could be around 2-4.5V

VCC should be 3-4.5V or 0V

The TC54 is a voltage detector which outputs the input voltage as long as it is above a certain threshold. When its lower the output is active low.

By using two npn-transistors in parallel I tried to get some kind of "OR-Gate" that pulls the base of the pnp-Transistor low, when a voltage is applied either the by voltage-detector or the usb-port. Which in turn keeps the voltage-detector alive.

Could this kind of "feedback-loop" actually work, or do I need to add some kind of hysteresis (for example a capacitance)? Is R15 needed? The data-sheet states an absolute maximum 5V for the Emitter-Base-Voltage.

Is it okay to put the transistors in parallel?

I had some doubts because I read a lot about the negative thermal coefficient and that because of that one of the transistors would run hot and take all the current. Does this apply to this case, where the current is so low, that each of the transistors could easily take it on its own?

It would be nice if someone would understand my schematic and could offer a brief feedback.

Assuming the TC54 you draw is the Microchip voltage monitor, that is already a sort of hysteresis intself.

Your schematic is still relatively simple, and your own analysis is pretty much right.

You need to be aware, however that the TC54 has an open-drain output, and doesn't pull to the V+ itself. Only the TC54VC has the extra transistor to drive the output. So unless you are using the VC model, you should make R9 go from V+ to the TC54 output, in stead of going to GND.

With regards to uneven current sharing between T4 and T5 that's a non-issue, because they will only ever need to pull a fraction of a mA, so even if one is taking all the current, that's still MUCH less than it can handle. The risk of heating and uneven sharing is when you are putting transistors parallel to have them sink (or source in case of a PNP) more current than only one single could.

If you put transistors parallel in a circuit where the current will never be higher than what the weakest can handle in the worst case scenario, you don't need to think about uneven heating problems in that regard.

To make it more tangible: If you have 2 transistors that can do 0.5A each, but you want to sink 0.7A, then you can put them parallel, but if they then heat up unequally, or if they are produced with a large margin, one can get the full 0.7A, which is 0.2A more than it can handle.

But in your setup these transistors should both easily sink 10mA, where the current cannot be above 5V divided by 10kOhm = 0.5mA, which is negligible in any scenario.

So, yes this should work, if you have the TC54VC model that has Low output when the input is below the set level. I haven't checked if they also have models that go high when the voltage is too low, but I don't think so.

If you have a TC54 with no VC behind the name, you need to move the R9 resistor as I just pointed out and it should still work perfectly fine.

• thank you for your answer! Yes I am planning to use the TC54VC "push/pull" version. So now I will try and route the PCB and see what OSHPark will make out of it. Thanks a lot, again :) – Jonas Eschmann Sep 16 '15 at 14:30