# Operator synthesis VHDL, numeric_std.vhd

if i include the library numeric_std.vhd (the implementation is here https://standards.ieee.org/downloads/1076/1076.2-1996/numeric_std-body.vhdl) you can see that the operator *,+ (as instance are implemented in the following way)

1. Unsigned sum

function ADD_UNSIGNED (L, R: UNSIGNED; C: STD_LOGIC) return UNSIGNED is
constant L_LEFT: INTEGER := L'LENGTH-1;
alias XL: UNSIGNED(L_LEFT downto 0) is L;
alias XR: UNSIGNED(L_LEFT downto 0) is R;
variable RESULT: UNSIGNED(L_LEFT downto 0);
variable CBIT: STD_LOGIC := C;
begin
for I in 0 to L_LEFT loop
RESULT(I) := CBIT xor XL(I) xor XR(I);
CBIT := (CBIT and XL(I)) or (CBIT and XR(I)) or (XL(I) and XR(I));
end loop;
return RESULT;

2. Multiplication

function "*" (L, R: UNSIGNED) return UNSIGNED is
constant L_LEFT: INTEGER := L'LENGTH-1;
constant R_LEFT: INTEGER := R'LENGTH-1;
alias XXL: UNSIGNED(L_LEFT downto 0) is L;
alias XXR: UNSIGNED(R_LEFT downto 0) is R;
variable XL: UNSIGNED(L_LEFT downto 0);
variable XR: UNSIGNED(R_LEFT downto 0);
variable RESULT: UNSIGNED((L'LENGTH+R'LENGTH-1) downto 0) := (others => '0');
variable ADVAL: UNSIGNED((L'LENGTH+R'LENGTH-1) downto 0);
begin
if ((L'LENGTH < 1) or (R'LENGTH < 1)) then return NAU;
end if;
XL := TO_01(XXL, 'X');
XR := TO_01(XXR, 'X');
if ((XL(XL'LEFT)='X') or (XR(XR'LEFT)='X')) then
RESULT := (others => 'X');
return RESULT;
end if;
ADVAL := RESIZE(XR, RESULT'LENGTH);
for I in 0 to L_LEFT loop
if XL(I)='1' then RESULT := RESULT + ADVAL;
end if;