# Pass device selection for bench DC power supply

I'm designing a DC Bench Power Supply. This one will be 0-30V, 0-300mA, but I expect I'll try some heftier models once I've gotten this one worked out.

I'm following the general design procedure described by Christophe Basso in his book Designing Control Loops for Linear and Switching Power Supplies: A Tutorial Guide. In particular, the following aspect:

1. Think of the overall circuit as a power stage (plant) with transfer function $H(s)$, and a compensator with transfer function $G(s)$.

2. Determine the transfer function of the power stage. (Experimentally is recommended, to capture effects of actual parasitics.)

3. Design the transfer function of the compensator, specifically its gain/frequency breakpoints, to compensate for the deficiencies of the power stage, producing the overall frequency response desired. This essentially conditions the loop gain transfer function for optimum performance vs. stability.

I'm using a power NPN BJT as the heart of the power stage. I've chosen a 2N3055, mostly because I have one on hand and its TO-3 case fits nicely into the enclosure I plan to use (a vintage HP 721A power supply).

I've managed to get a nicely stable circuit for the constant voltage aspect with the schematic below. (constant current, metering, etc. to follow) The loop gain Bode plot looks like this. Things shift around a bit based on the programmed voltage and load, but this roughly represents the center point, with $\phi_m$ of 64° and gain margin of 27dB: However, the bandwidth I'm able to achieve is relatively low (roughly 1-2kHz), and that limit is driven by the low-frequency pole of the 2N3055 (about 9kHz). That pole is the "right-hand" pole for my phase boost, which puts the peak of the boost in the neighborhood of 1.5kHz.

So my question is: Is this just the best bandwidth I can expect from a BJT-based power stage? Or can a clever selection of a different power device allow me to get an order of magnitude or more bandwidth improvement?

From fuzzy memory, there are (at least) two grades of 2N3055. There's poor and then really poor. The poor version has higher $H_{\text{fe}}$ and $f_T$ than the really poor ones. You probably won't be happy with either of them.

There are two basic topologies used in linear power stages: Emitter Follower, and Common Emitter. We'll start with the Emitter follower since it's easier to use and more common.

Emitter Follower

The presence output filter capacitor $C_2$ will mean that there are two poles in the power stage transfer function. There's the first at about 10kHz (in the best case for the 2N3055) due to $C_2$ and the second at $\beta$ rolloff, that shows up between about 20kHz and 60kHz (depending on $\beta$ and $f_T$).

Here are some rough expressions for the LFP frequencies:

$f_{\text{p1}}$ ~ $\frac{1}{2 \pi C_2 \left(\frac{r_b}{\beta }+r_e\right)}$ ; $f_{\text{p2}}$ ~ $\frac{f_T}{\beta }$

For 2N3055; $r_b$~4Ohms, $\beta$~130, $C_2$=470uF, forget about $r_e$ for now (it's less than 1mOhm), so $f_{\text{p1}}$ ~ 10kHz. With $f_T$~2MHz, $f_{\text{p2}}$~15kHz. The expression for $f_{\text{p1}}$ is written for the case of very low impedance base drive. As base drive impedance increases, the frequency of $f_{\text{p1}}$ decreases until it will become the $R_{\text{Load}}$$C_2$ pole frequency.

Common Emitter (CE)

There are more moving parts with the common emitter, which add up to make things a lot more complicated than the emitter follower. This is the same topology that is used in Low DropOut regulators (LDOs), which are well known to be hard to stabilize. To make things a little more clear, here's a schematic of a small signal AC model of the common emitter. simulate this circuit – Schematic created using CircuitLab

First, write an equation of DC gain by setting frequency to zero in the model.

$A_o$ = $-\frac{\beta R_{\text{Load}}}{r_b+(\beta +1) \left(r_e+R_E\right)+R_4}$

Obviously, $A_o$ is a function of $\beta$, $R_{\text{Load}}$, $R_4$, and $R_E$. For the same values as before for the 2N3055, and $R_4$=1kOhm and $R_{\text{Load}}$=100 Ohm, $A_o$=-13. But, let's say $R_4$=10 Ohms, then $A_o$=-945. If then, in addition $R_E$ were changed from zero Ohms to 1 Ohm, $A_o$ would be reduced to -90. So, one of the problems with CE topology is extreme variation of gain with parameter changes.

What about the poles? First let's look at the pole caused by $\beta$ rolloff to $f_T$. In the model, eliminate all the capacitors and write the transfer function. It's kind of big, but there is just one pole, which after solving for the root gives the pole frequency for $\beta$ rolloff.

$f_{p-\beta }$ = $\frac{f_T \left(r_b+(\beta +1) \left(r_e+R_E\right)+R_4\right)}{\beta \left(r_b+r_e+R_4+R_E\right)}$

For some parameter values it's basically the same as the $\beta$ pole of emitter follower. But it is also very sensitive to $R_4$ and $R_E$. For example if the same parameters for 2N3055 are used as before along with your schematic values for $R_4$ (1kOHm) and $R_E$ (zero Ohm), then $f_{p-\beta }$ ~ 15kHz. But if $R_4$ is lowered to 10 Ohms and $R_E$ is set to 1 Ohm, then $f_{p-\beta }$ ~ 150kHz.

The low frequency pole is set by $C_2$ and $R_{\text{Load}}$, as you know, to be about 3Hz, but that isn't a function of transistor parameters in the CE topology. Let's take a look at the response when $R_4$ = 10 Ohms and $R_E$ = 1 Ohm, just for fun. So, $A_o$ of -90 (39dB), LFP~3Hz, $f_{p-\beta }$~150kHz. For open loop crossover of 10kHz, 30dB of gain would be needed. The OpAmp would need to be an integrator with a zero at 3Hz and 30dB: R1 of 31kOhm, C1 of 1.5uF. An LF111 could probably just do that. Gain sensitivity would still be a concern. Also, at wider bandwidths there would be added concerns about the Miller pole, a right half plane zero, and poles caused by package inductance.

To do better than a 2N3055 you would want to increase $\beta$ and $f_T$, and lower $r_b$. It seems like most manufacturers of the higher frequency power BJTs have concentrated on lower $C_c$ (which doesn't matter with the emitter follower, but would help the CE with the Miller pole) and higher $f_T$, but not much different $\beta$ and $r_b$. So, $f_{\text{p1}}$ is hard to change.

Also, consider dropping the TO-3 for a TO-220 or TO-263. The TO-3 is big and has a bigger loop area, and (another vague and fuzzy memory) contains Kovar (which is Ferrous). Thus the TO-3 is more inductive than the TO-220 and TO-263.

• Very helpful answer gsills, thanks very much! :) I'm starting to believe the best I can get out of this topology is perhaps 10kHz bandwidth. So I think the next question for me is how important bandwidth is in such an instrument (especially when there's a pretty hefty output capacitor). If I do determine it's important, I'm inclined to explore the direction @markrages suggests and try a MOSFET pass device. Btw, I think this power stage topology is common emitter, isn't it? Because the S(ense)+ is the ground/reference and output is S-? But that's a separate question I suppose :) – scanny Sep 22 '15 at 19:15
• @scanny - You should run a Bode plot of Vout ($S_+$ - $S_-$) relative to Q1base (Q1b-$S_-$) for the power modulator response. It should be flat out to ~10kHz (fp1). Exclude R4 from this. 10kHz bandwidth should be a snap with a properly driven 2N3055 , and 50kHz maybe with proper compensation(easier with better part). Topology is emitter follower - signal path is from v.unreg+ to Q1c, out Q1e to Rload to v.unreg-. Current into Q1b increases differential V across Rload. The +/-12V is referenced to Q1e, while v.unreg floats, but all relative voltages act like emitter follower. – gsills Sep 23 '15 at 1:50
• That's interesting you mention the modulator transfer curve, that's exactly where I started with my analysis and I get precisely the response you describe: p1 breakpoint at ~10kHz and p2 at ~6.8MHz. The problem is the $R_{load} C_{out}$ pole is low (~10Hz) followed by the op-amp low pole (18Hz), and I only have the one zero ($R_1 C_1$) to position the boost against the 2N3055 p1. Have I gotten the pole/zero positioning wrong or is there another one I can use to offset the 2N3055 p1 or something? – scanny Sep 23 '15 at 4:08
• @scanny - Thanks for the accept. While thinking about your last comment, I decided to redraw your schematic, instead of just looking at yours. When I was finished, I realized you are right, the power stage is common emitter. I'll be editing the post to make it more relevant to that. – gsills Sep 25 '15 at 4:08
• I've been working my way through the procedure you've outlined step by step, learning a lot at each step of the way :) I'm a little stuck on the derive the transfer function part, I've posted a follow-up question here in case you're interested in it :) electronics.stackexchange.com/questions/194536/… – scanny Oct 10 '15 at 17:09

2N3055 is a cheap transistor that can dissipate a fair amount of power. But that is all it has going for it. You can get better bandwidth from another transistor. Just about any other transistor will do better than 2N3055.

You are driving the transistor directly with LF411. This will barely work with a 300 mA output. But it would be better to add another driver transistor when you are using a low-gain device like 2N3055.

You can address both concerns by switching to a MOSFET pass transistor.

• As a next step I'll be adding a PNP emitter follower driver stage to pull base current from the pass device. I just wanted to take things one step at a time so as to reduce the variables while I was getting to know the circuit and design process. Could you recommend a criteria for selecting a better BJT pass device? "Just about any other transistor" doesn't narrow it down very far :) – scanny Sep 21 '15 at 3:05

That's rather a high base resistor you are using to drive the 2n3055. It may be affecting the bandwidth as well as the available output current.

Try putting another transistor ahead of it to make a darlington with a lower resistor between base and emitter of the 2n3055.

You also need some short circuit protection. A sense resistor in the emitter of the 2n3055 with a transistor to absorb the base drive when the sense resistor voltage gets above 0.6V.

• Hi Kevin, I adjusted the base resistor to give me about 500mA at 30V, both on the simulation and the bench; so I'm thinking that's not the bandwidth limiting factor. I'll be adding a PNP "driver" as the next step, just wanted to minimize complexity while I get my head wrapped around the compensator design. I'll also be adding constant current, which will take care of short-circuit protection. I've been focusing all my attention on understanding the feedback bits of the compensator; all the rest I've made work before. That's why I've removed every possible extra component for now :) – scanny Sep 21 '15 at 3:30
• Ah, I think I see what you're saying now about the base resistor Kevin. That it's high enough to possibly form a pole with the input capacitance of Q1 that would fall in the frequency range of interest, is that right? Sorry for being dense about that initially. I was trying to maximize the output voltage range of the op amp to minimize the overall loop gain, but I think I may have to take a closer look there; thanks for the heads up :) – scanny Sep 29 '15 at 18:19