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consider the following diagram:

http://ee-classes.usc.edu/ee459/library/datasheets/DM74LS181.pdf

( page 3 )

The first AND gate at the top left of the schematic has only one input! What does this do on a logic level? It seems strange to me!

Also: What does the NOT gate with the circle on the other side mean?

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    \$\begingroup\$ I am guessing to match propagation delays. Circle at the input of a gate its effectively like putting a NOT gate infront. So that symbol looks like an inverting buffer. \$\endgroup\$ – Golaž Sep 22 '15 at 16:58
  • \$\begingroup\$ They probably wanted the symbol to match the way it's really fabricated. They may have multiple the 4 input AND and 4 input NOR gates structures in the chip while some inputs are permanently set either to '1' or '0'. \$\endgroup\$ – Alexxx Sep 22 '15 at 17:54
  • \$\begingroup\$ For the purposes of manufacture, it could be cheaper to build multiple blocks of "4x-four-input-AND-to-1x-four-input-NOR" than fabricate precisely what is present in the diagram. Unused pins and gates are left off the diagram for the sake of everybody's eyes. \$\endgroup\$ – CharlieHanson Sep 22 '15 at 17:56
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enter image description here

AND gate with one input simply means that all inputs are shorted together. If the AND gate has two inputs then it will function according to above truth table (only the yellow squared one inputs are eligible).

Moreover, buffers are generally (inverting) NOT gates, so two back to back NOT gates will give a non-inverting buffer. NOT sign before the input simply means the signal is being inverted before fed to the non-inverting buffer. Logically it is same as inverting buffer. It might have been done so for propagation delay matching, I am not so sure.

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In this instance it looks like the AND gate is being used to match the propagation delay of the other inputs to the next logic stage.

AND and NAND gates are also often used with the inputs shorted to be used as a buffer and an inverter, respectively.

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