Step-down converter input and output capacitors

Question

In the below pictured circuit for the MC33063 by TI, how important is the capacitance of the inpu-output caps? I understand why they're there, I don't know what the recommended capacitance is derived from. I am using the QFN package.
The reason I ask is that I have very little space left on my board and the caps tend to get relatively large, even at 16V, not to mention more. I think I might be able to cram a 100uF/6.3V on the output in a B case, and a 100uF/16V C case on the input, both tantalum, but I doubt they'll be low ESR.
Possibly if the capacitance was slightly lower, I could either use a smaller case or lower ESR. Real input voltage will be 12-14V.
Would that be possible?
Also, what is the smallest package available for the diode?

Update: This is what I've come up with so far. If I can find all three in B case, given that the output will be a pair of 220uF/6.3V, than I can fit them.
Please don't mind the dirty schematic with incorrect values for 4.1 output etc.

Answer 1

The input and output caps are very important .The buck convertor like many others draws current in lumps ,basicly when the switching transistor inside your chip is off no significant current is drawn and current is drawn when the switch is on .The current waveform is at the switching frequency and is in a trapizoidal shape rich in harmonics and probably will have a spike on the leading edge ! SO the input cap is selected for low ESR at the switching frequency to encourage the HF crud to flow through the cap and NOT radiate along the input cable .This is why you often see in inductor in the input power wire .Most importantly the cap must be able to handle the ripple current for your product to have a long life .Generaly its easy to substitute a ceremic SMD cap here.On the output the cap must be low enough impedence to keep ripple to an acceptable level for your load AND it must handle ripple current ,not as much as the input on your orthodox chip,AND its part of the control loop in fact its ESR effects the bode plot .If you change the output cap you must check for instability.Have you considered a higher frequency approach that has no chip that reduces switching losses that will run on ceremic caps all round ? Maybe the LF chip isnt so small due to big caps and coil .