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I am working on the prototype of a circuit that does some data acquisition and preprocessing on an FPGA (Mojo Board). After preprocessing I quickly need to get the data to the PC. For that I want use an FT2232H mini module in the synchronous FIFO mode. The Mojo board and the FT2232H board are currently connected together using short wires of a ribbon cable of about 2 - 3 cm length. My problem is, that once the FT2232H is put into FIFO mode it generates a lot of noise in the ground. This noise is exactly at the 60 Mhz frequency of the CLKOUT signal of the FT2232.

Between different points of the ground plane of the FT2232H board I measure oscillations at t up to 500 mV peak to peak and between the Mojo board ground and the FT2232H board I see in excess of 1 V. The weird thing is that I also see this 1V or larger oscillation across the short grounding wire (3 cm) that connects the FT2232H board to the FPGA board.

The oscillations are also found on all the control signals ( TXE, RXF, RD, WR) and lead errors in the connection leading to a large percentage (>20%) of bytes being lost. How can I reduce the ground noise to acceptable levels?

So fare I have tried:

  • adding a capacitor (100 nF ceramic multilayer) in the FT2232H board between 3V3 volt and GND: no change
  • directly soldering the grounding wire to the board on both ends:
  • setting different levels of termination on the FPGA side using in_term = unbalanced_split_75, unbalanced_split_50, unbalanced_split_25 as well as pulldown in the ucf file for the FPGA. This seems to improve the amount of lost bytes significantly but does not change the height of the oscillations on my ground plane.
  • adjusting the output power of the FT2232H using the FTDI software: lowest power seems to be best for getting bytes through.

In the end I still loose >10% of my bytes and still have > 1Vpp noise in my ground plane. What am I overlooking?

edit: The problem does not happen when the system is just connected to the PC via USB but only when the synchronous FIFO mode is started. All measurements I did were taken with an oscilloscope probe with a short (~5 cm) grounding clamp and a decent scope at either AC1MOhm or DC1MOhm coupling.

I found two sources on the web that also deal with similar problems with the same chip but their solutions do not seem to work for me. I can't post the links because of too little reputation.

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  • \$\begingroup\$ How are you providing power to these circuits? \$\endgroup\$ – Laszlo Valko Sep 22 '15 at 20:47
  • \$\begingroup\$ Wow, something is very wrong. Test the system when it's not connected to usb. I suspect you have currents running where they are not supposed to. Do you have a scheme? What and where are you measuring? 1Vpp at 60mhz looks like bad measurement. Did you try short ground lead? \$\endgroup\$ – Gregory Kornblum Sep 22 '15 at 20:49
  • \$\begingroup\$ The FPGA is powered via 7.5 V wall wart and the FT2232H is powered from from the USB port. \$\endgroup\$ – user2129439 Sep 22 '15 at 20:49
  • \$\begingroup\$ There is no noise when no connected to USB and there is also no noise when the FT2232H is connected to USB but not in synchronous FIFO mode (then the 60 MHz CLKOUT output is also turned off). \$\endgroup\$ – user2129439 Sep 22 '15 at 20:51
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    \$\begingroup\$ The FT2232H (through the USB port) is most probably grounded to the PE through the computer. If the FPGA's ground is tied to some other potential, there could be large ground currents flowing. The wall wart is probably floating, so I'd look for the source of the trouble first at the data aquisition inputs, especially their ground levels. You could (for a test) disconnect the FPGA from the FT2232H, and measure AC & DC current between their grounds (there should not be any substantial current flowing). \$\endgroup\$ – Laszlo Valko Sep 22 '15 at 20:54
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You're probably seeing two things here: EMI pickup on the scope probe ground wire coupled with crosstalk in the ribbon cables. Try a measurement with a short (5mm) ground wire - take off the scope ground lead and remove the witch's hat (retractable clip), then wrap a piece of bare wire around the exposed metal sleeve. Measure across some bypass cap on one of the boards and see what you get. Also check the signal lines. You should never see 1 Vp-p variation on ground planes that are electrically connected unless you're moving around many, many amps.

Crosstalk in the ribbon cables is a bit more complicated to deal with. Since turning down the transmit power on the FTDI chip improves the throughput, this seems like a likely explanantion. The best solution is to wire up the cable ground-signal-ground or ground-signal-power-signal-ground. It may be possible to get an old IDE cable with interleaved ground wires and use that. The 60 MHz clock line is going to be the most sensitive - it may be worth trying to send that separately with a twisted pair of signal and ground return. A better solution would be to get a board made (or find an existing board) that integrates the FIFO chip and FPGA on the same board.

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  • \$\begingroup\$ What did the trick was connecting the ground planes of both board together. I scrubbed part of the solder stop off the bottom side of the FT2232H mini module and off my second PCB (this is not the Mojo board, but an additional board that contains a DAC and some digital 5V level I/Os) and connected them together using two 90° angled pins. Now the ground noise is somewhere below 400mVpp across the whole circuit. Almost all of my bytes seem to get through (<2% error and that might be because of some programming error). I removed all termination from FPGA and set the FT2232H to 4mA and fast slew. \$\endgroup\$ – user2129439 Sep 23 '15 at 23:28

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