How do you maintain creepage distance between diff pairs and the LED terminals on an Ethernet connector?

My understanding is that based on EN60950, for 250V IT equipment, the air clearance is 2mm and the creepage distance is 2.5mm. Yet, the placement of LED pins on PCB mount Ethernet connectors almost force you to violate this clearance rule.

Should I be driving my LED’s through a 2kV optical isolator?

Should I be moving my diff pairs to an internal layer? I’ve done this for the unused PoE pairs, but I don’t really want to do this for the active signal pairs because the via’s will act like stubs and introduce an impedance change.

The application notes I’ve found for Ethernet layout seem to only focus on the EMI side of things, and don’t even mention creepage/clearance distances.

Am I trying to solve a problem that doesn’t actually exist? Am I miss-understanding the standard?

Below is a picture of my existing layout.

enter image description here

EDIT: Picture below is slightly zoomed out and shows the isolation around my ethernet connector.

enter image description here

  • \$\begingroup\$ Put slots in the PCB if that is a concern. Use smaller pads for the LEDs - inside layers are also a concern. How isolated is the chip (slightly shown that feeds the Ethernet connector) from LED driving circuits? \$\endgroup\$
    – Andy aka
    Commented Sep 24, 2015 at 8:04
  • \$\begingroup\$ Thanks for the slot suggestion @Andyaka. I have updated the attached picture to show the isolation around my ethernet connector and the magnetics. I will have a play with creating slots to try and achieve a 2mm clearance distance. \$\endgroup\$
    – philby
    Commented Sep 25, 2015 at 0:37
  • \$\begingroup\$ @Andyaka What do you mean by "The inside layers are also a concern"? I thought they would be OK as they are sealed on an internal PCB layer, much like a wire traveling through an insulated cable? \$\endgroup\$
    – philby
    Commented Sep 25, 2015 at 0:38
  • \$\begingroup\$ Followed your advice @Andyaka. Added some slots between the diffpair's and LED pins, and also shrunk the size pcb pads. I am now meeting the 2mm clearance specification and 2.5mm creepage specification. \$\endgroup\$
    – philby
    Commented Sep 25, 2015 at 1:50

1 Answer 1


You does not need to drive the LEDs via an isolator.

First of all, Ethernet specifies 1.5 kVrms @ 50/60 Hz @ 1 min basic isolation. What does it mean? It means that typically the voltage applied/existing between the sides of the isolating transformer must be around zero all the time the device works and only during the specified time (generally, once in the life cycle) the voltage could be 1500 Vrms sine (not distorted heavily) continuously during 60 sec max. Once you'll have that voltage happen you need to stop using the device and re-test its isolation properties. It is hard to say before what voltage difference between the transformer sides (windings) the device will still work, but the basic isolation conditions mean that any voltage outside a "technical" zero leads the device not to work. For opposite example to an Ethernet transformer for which only basic isolation parameters (Viso @ freq @ time) are specified, an ADuM isolating device is additionally determined with the parameters (Viorm < Viso) specifying the max voltage diff between the chip sides before which the device will continue its function properly.

Second, look at your design. Why do you aware about the tx/rx pairs but not about the traces from RJ45 to the BS termination? And why not between the LEDs traces and the chassis ground? Also, recall that the RJ45 jack has a metal shield connected to (chassis?) ground and the only one that separates it from the tx/rx pairs is the top mask layer. Again, wired Ethernet is designed to (properly) operate in well-grounded, earthed environments where a hi-pot between a two points shall not occur. If a hi-pot occurs it is a fault condition and the points must (try to) withstand it during a very short time a little bit (but guaranteed) longer that the time needed by an external devices (breakers) to isolate/eliminate/shutdown/etc the hi-pot and/or fault conditions. If you need to deal with hi-pot and/or other electrical faults, you need to use glass/plastic fiber optic Ethernet.

Third and last, there are many pcb routing examples provided by Ethernet chip manufacturers, i think there are may cases similar to your interest/design goals. You need to lurk more and better :-)

  • \$\begingroup\$ Hi @asndre, thanks for your reply. I realise that the LED's don't need to be isolated from my main circuit, just from the ethernet pairs coming into my board. As far as BS to LED isolation distances, my logic is that they are on internal layers, so they are effectively sealed inside the PCB, eliminating creepage issues. \$\endgroup\$
    – philby
    Commented Oct 19, 2015 at 3:22
  • \$\begingroup\$ Hi @philby, i see you are still misunderstanding what i tried to say. I'll try once again. You must distinguish the requirements caused by the rated voltage and the requirements caused by the basic isolation level. \$\endgroup\$
    – asndre
    Commented Oct 20, 2015 at 16:49
  • \$\begingroup\$ Creepage distance and [air] clearance depend on the rated voltage and the pollution degree (env. category). The rated voltage is the voltage being applied to the device circuits all the time the device is operating (during the life, measured in years). \$\endgroup\$
    – asndre
    Commented Oct 20, 2015 at 16:54
  • \$\begingroup\$ 1.5kVrms @ 50/60 Hz @ 60 sec is about basic isolation level and having nothing common with the rated voltage and the dependent requirements. That voltage level can be applied to the device circuits during very short time, measured in seconds. \$\endgroup\$
    – asndre
    Commented Oct 20, 2015 at 16:57
  • \$\begingroup\$ Normative documents (i.e. IEC standards) generally specify the design requirements for a rated voltage given. From my experience, i so no standards specifying the design requirements for a basic isolation level given. \$\endgroup\$
    – asndre
    Commented Oct 20, 2015 at 17:01

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