# Voltage Gain decreases when load resistance included

Why does the voltage gain of a (voltage divider) common emitter bypassed emitter bias bjt amplifier decreases when putting a load resistance on the output Vo? I mean Vo should remain the same because resistances in parallel have the same voltage across them. Link below provides the image for the circuit diagram:

Here's the picture: - Output voltage is $I_C R_L$ and, if $R_L$ halves then voltage gain halves. I believe you are mistakingly thinking that the collector generates a voltage. It doesn't. A BJT is commonly defined as having current gain i.e. Ic/Ib (or hFE). Input current is proportional to input voltage in the circuit above so now you have the transistor with an output current for a given input voltage.

The output current is converted to a voltage by $R_L$ and of course, the lower the value of RL, the lower the output voltage for a given input signal.

The voltage gain is just the transconductance gm multiplied by the collector resistance in parallel with Va/Ic = ro (the latter accounting for the Early voltage). See the hybrid pi model, which is the minimum model you need to predict the voltage gain.

Any load resistance appears in parallel with the collector resistance, so the voltage gain drops proportionally. 