# BJT Puzzler: Common Emitter or Emitter Follower?

A few high-reputation members have disagreed on this in the context of other questions, so I thought I'd post it as a separate question.

Question: Is the NPN BJT in this circuit configured as common emitter or common collector?

Note that, perhaps unusually, the S+ node is ground and the S- node is the output. 'S' here stands for sense, but for present purposes can be interpreted as $V_{out}$.

This is part of an DC Bench Power Supply circuit, and looks like this at the block level. Note the op amp-ish looking symbol represents the entire amplifier, not the LF411 op amp specifically:

Abstracting out the op amp to a signal voltage source, I believe these two are each alternate layouts for viewing the circuit. I've purposely laid them out in forms reminiscent of classic common emitter and common collector (emitter follower) respectively.

I don't want to spoil the fun for anyone, so my own conclusion is in the spoiler bar below. Roll your with your mouse to see if you like. This represents my best working conclusion. I still have a shred of doubt in my mind :)

Common emitter, more specifically, grounded emitter. The BJT adds gain to the circuit, proportional to the load resistance.

Answers should state the rationale for their conclusion. I think one of the cool features of conundrums like this is it forces one to dig for what is essential in the form, not just recognize it in classical form :)

• ooh, a trick question! – gsills Oct 1 '15 at 3:29
• I'm trying to figure out who thought that was a good circuit for a power supply...really, neither end of your 45V source is tied to a fixed voltage? That looks like a recipe for problems. – alex.forencich Oct 1 '15 at 3:40
• @alex.forencich - This is essentially the exact circuit (minus compensation components) for the Agilent E3610A I have. They use a darlington and there's a PNP driver transistor in there, but the gain profile is essentially the same, just shifted up a few dB because of the darlington (2N6056). It's quite common in my experience to have floating output on a DC bench power supply, and V.unreg is referenced to S-. Is that what you were getting at? – scanny Oct 1 '15 at 3:43
• This is a good question. And, the way things are going it looking like one of the best questions here in a while. – gsills Oct 14 '15 at 23:07
• @scanny to date has the best formatted questions. Well done. – efox29 Oct 14 '15 at 23:17

I wasn't going to answer this question, since I had already been through it with an earlier question from the OP (scanny). But, it's turned into such a mess, can't help it. I mean, 1 right answer out of 3 so far? How is this circuit so confusing? We'll get to that, but first some history.

When I first saw this circuit I wrote an analysis of it as an emitter follower. I didn't see the ground at first, since it was cleverly concealed in plain sight between the U1 inverting input reference and $R_{\text{load}}$. Then in a comment scanny suggested that he thought the circuit was common emitter. What's he talking about? I looked at the circuit again and did a mental experiment varying node voltages and thinking about what that must mean, and everything still seemed to act like an emitter follower, so nah. But scanny had additional observations about the behavior that didn't make any sense for and emitter follower, but made a lot of sense for a common emitter. So, I redrew the circuit from scratch to look into things further. After redrawing the circuit I realized that I was dealing with an idiot: Me at 1am.

Here's an annotated version of the circuit I got on redraw:

simulate this circuit – Schematic created using CircuitLab

Redrawing the circuit as a small signal AC model made me reorient everything, and really think about V.unreg, V.ref, and where all of the grounds were. Resulting circuit is clearly a common emitter.

Important to realize in the circuit:

• The real reference is S+ or ground.
• V.unreg is differentially 45V, but common mode floats with Q1-c.
• Both V.unreg and V.ref act as offset voltages.

If you compare the change of voltage across $R_{\text{load}}$ seen when U1-output is modulated in this circuit, to the original circuit, you'll see the two circuits do the same thing.

But, why has this circuit been so confusing?

Although, the original schematic is well drawn, the orientation of Q1 and relative placement of V.unreg and $R_{\text{load}}$ are very like one would expect for a emitter follower power stage. Emitter follower topology is also expected in an application like this (usually, since common emitter has many more stability concerns).

It's a kind of framing. People, by habituation, get spring loaded to see an emitter follower first. Once seen that way, there is denial of other points of view.

Here, let's re-redraw the circuit, in another different, but equivalent way.

simulate this circuit

It's pretty clear that everything is referenced to S+, V.unreg floats, and the voltage at S- is modulated by Q1-c through changing the common mode voltage of V.unreg.

• I just deleted my answer. It was all "common collector / emitter follower" for exactly the same reasons you mention in your second paragraph (except I was not an idiot at 1 am, but in idiot rushing an all-too-simple (?!) answer in the coffee-break after an annoying meeting. However, had I done my small-signal analysis like I should have, I would have ended up at exactly the solution you mention. Thanks for taking the time to redraw the schematics and pointing out the insignificance of the 45 V source in the AC (small-signal) model. – zebonaut Oct 15 '15 at 8:16
• I'm thinking about what you say and I'll be back!!! – Andy aka Oct 15 '15 at 8:49
• @zebonaut, I think most are at least somewhat biased to see circuits that resemble this as emitter followers, easy to be tricked by yourself. Floating the 45V source was very subtle. An interesting circuit. – gsills Oct 16 '15 at 3:51

Is the opamp power supply referenced to S+? If so the BJT is as you say in common emitter configuration and you will have problems stabilizing the feedback loop.

• Yes, the op amp power supply (12+ and 12- in the schematic) is referenced to S+. I've removed all the compensation components just to focus on the BJT amp configuration, but yes, it is a challenge to compensate. Makes me wonder why professional DC power supply designers choose this circuit :) – scanny Oct 1 '15 at 3:39
• They "floated" the opamp power supply so that the voltage range of the output of the circuit overall could be much greater than what the opamp would be able to handle directly. – Dave Tweed Oct 1 '15 at 11:44
• Say Kevin, could you elaborate your reasoning a bit? It looks like we still don't all see it that way, so hoping you can help us follow to your conclusion :) – scanny Oct 2 '15 at 5:59

Here is the relevant part of the circuit re-drawn: -

There is 45V on the collector relative to S-.

The emitter voltage does what the op-amp output does (-0.7 volts lower) i.e. it is the control element and it's an emitter follower.

If I drew the the circuit with S+ being the output and S- being called "ground", would anyone disagree that this is a common collector: -

Have I made an error in this conversion? My simulation (using V4) as stimulus gives me the results I would expect for a common collector but unfortunately my simulator is giving daft results if I ONLY swap the ground and Vout labels so this is annoying.

Here are the results as per the circuit above: -

The gain is 12.146 dB from DC to well over 100kHz, 3dB point is 1.246 MHz and phase angle is -71 degrees at this frequency. Am I missing something here? Am I also being stupid (not unheard of)?

If I wired two 7805s like this: -

Does it turn the bottom 7805 unstable? This is a perfectly valid circuit connection and on fig 17 in the Fairchild data sheet it shows a similar example: -

There is a lot of good work suggesting it is a common emitter so I'm beginning to feel I may have missed something here?

• But since the op amp supply is referenced to S+, its output voltage varies a few mV either way from 0.7V, just enough to provide the current demanded by the sampling summing point (non-inverting input); (which would hover very close to 0V for whatever that might matter). And since the output is S-, you would get roughly say -30V out for a change of 0.3V in, for a gain on the order of 100. Am I missing something? – scanny Oct 2 '15 at 6:03
• @Andy your mistake seems to be over looking that the U1 is referenced to S+ in every way. Therefore it drives Q1-b with respect to Q1-e. Emitter doesn't follow anywhere. – gsills Oct 14 '15 at 21:57
• I mean that since the OpAmp is referenced to ground, and also the emitter it will drive the base with respect to the emitter. After reaching the active region, very small changes in $V_b$ can cause large changes in $V_c$, but $V_e$ will not change. The emitter doesn't really follow the base. – gsills Oct 14 '15 at 22:50
• @Andy, there are 2 key and subtle concepts that make the original circuit (OC) in question a common emitter (CE): V.unreg floats freely and Q1-b is driven with respect to Q1-e by U1 since U1-inv uses Q1-e and S+ as reference. Any circuit drawn where V.unreg is directly tied to either ground or reference will not be equivalent to the OC, and thus not relevant to the question. Could an emitter follower (EF) be used in a regulator instead of the OC? Sure, but it would be a different circuit. – gsills Oct 16 '15 at 3:22
• The circuit you added with S+ as output and S- as ground, has emitter follower as power stage. But isn't equivalent to the OC. Here, feedback for OpAmp is from Q1-e to X1-inv, like you'd expect for EF. But the reference into X1-noninv is conflicted, tied to both ground and Vout. So, regulator is self modulating and reference is not stable. Simulation results from that circuit should not be trusted. – gsills Oct 16 '15 at 3:36

If you draw the AC equivalents right and leave off most of the biasing, CC and CE amplifiers look almost identical. (Remember, ideally no current flows through the signal source!)

simulate this circuit – Schematic created using CircuitLab

simulate this circuit

But of course, they're not identical. The DC biasing matters too! Remember that in the linear region, $V_C > V_E$. The AC model alone doesn't guarantee that. Looking at the direction of the DC+AC current flow makes the difference clear:

simulate this circuit

simulate this circuit

So here's how to tell the difference. If the load current flows from the collector node to the emitter node, it's common emitter. If the load current flows from the emitter node to the collector node, it's common collector. I think this rule works all the time for DC-coupled outputs. For AC-coupled outputs, it works at the peak collector/emitter voltage.

Regardless of how you draw it, your emitter is connected directly to the high side of the output. That makes it a common-collector amplifier (emitter follower).

EDIT: I'm going to simulate this:

simulate this circuit

I don't know, guys, this looks an awful lot like a CC linear regulator to me. The reference voltage generation is weird, but I don't see how that changes the basic topology. There's a high unregulated voltage on the input, a lower regulated voltage on the output, and an NPN transistor in between. S- is the common node that's shared between input and output, and current flows from S+ to S-. Negative feedback is taken from S+. How can that be anything other than an emitter follower?

Maybe I'm missing something. I'll try it again with the op amp circuit replaced by a DC voltage source (Vctrl). The question now is what to use as the source ground? I'll try S- first:

simulate this circuit

I swept Vctrl from 0V - 47V, and saw the behavior I'd expect of an emitter follower. Now I'll try referencing the source to S+:

simulate this circuit

Sweeping Vctrl from 0V - 1V now gives me a lot of gain on the output. I suppose you could call it inverting if you swap the output polarity, so I guess I can see why you'd call it CE. The main difference seems to be that in the first case I'm controlling $V_{BE} + V_O$, and in the second case I'm only controlling $V_{BE}$.

If I take the view that I'm controlling $V_{BE}$ with the load on the collector, then it starts to sound more like a transconductance amplifier than any of the usual voltage amplifier topologies. I guess that's what you'd expect from a bare transistor circuit. But the output voltage is constant...

I'm missing something, but I'm not sure what it is.

• There are 45V to keep $V_c$ > $V_e$. But, are you saying that this is an emitter follower that inverts? Because AC wise, it inverts, like a common emitter would. – gsills Oct 14 '15 at 22:41
• I've updated my answer. Maybe you can help clear up my confusion. – Adam Haun Oct 15 '15 at 1:32
• Heh, well looking at the simplified circuits, with Vctrl connected to S+ first. This looks to me to be the situation. If $V_b$ is increased a little, $V_c$ drops a lot. There's inversion, and has to be Miller multiplication going on. Just seems to be what would in practice be CE. Where Vctrl is connected to S-, I agree would be emitter follower. Because Vctrl is not connected to the emitter, but isolated by $R_L$. I'd say in that case having the ground symbol where it is is kind of bogus. I think it comes down to where vcrtl is referenced. – gsills Oct 15 '15 at 2:50
• As far as the power stage is concerned when vcrtl is connected to S+, it is possible to swap positions of $R_L$ and $V_{\text{unreg}}$, and basic function of Q1 is unaffected. But that doesn't work at all in the circuit with vctrl connected to S-. – gsills Oct 15 '15 at 2:54