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I was reading:

http://www.cs.bu.edu/~best/courses/modules/Transistors2Gates/

To teach myself transistor logic, but I have some questions on what I believe are unnecessary strucutres (most likely since I don't understand their physical need).

In the construction of the not gate, the site gives a combination of our input being split and connected to a $N$ transistor and $N^{-1}$ transistor such that the sink of $N^{-1}$ is the sourceo f $N$ and the output Z flows from between the two transistors

(The book didn't give a notation for specifying the normal and complementary transistors so I made my own, the behavior of N is if the input is 1, then it doesn't let the current flow,and $N^{-1}$ is complementary behavior)

Now I'm curious as to why we can't just have a single $N^{-1}$ transistor, with X as the input, and we take its sink to be the output. The sink will only have current flowing if X doesn't have charge, other wise it won't have current flowing if X does have charge.

Thats exactly the behavior of the not gate, so I guess the question reduces to: physically why do we need two transistors there?

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Two transistors are needed if the output must be actively driven both high and low, which is usually the case. If, for instance, only the lower transistor were used, then when the transistor is ON, the output is pulled low, but when it is OFF, the output voltage can be high or low or anywhere in between. As shown, either the output is pulled low (logic 0) or it is pulled high (logic 1). A similar output stage will be used on almost any output, whether it's gates, flip-flops, shift registers, counters or whatever.

As a note, some logic only uses a single transistor, usually connected to ground. When the transistor is a bipolar transistor it is an NPN, and the output is called an open-collector output; for CMOS it's an open-drain output. Generally, this is connected to Vcc by means of a resistor, which provides pullup when the output is a logic high. Examples are the TTL 7406/74LS06, or the CMOS 74HC06.

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  • \$\begingroup\$ Does that mean we could implement a non active and gate using a single transistor? If X and Y are the inputs to the and gate and become the source and input to the transistor and Z the sink. Then it follows that Z would only be carrying voltage if both X and Y carried voltage which is by definition an AND gate \$\endgroup\$ – frogeyedpeas Oct 1 '15 at 6:05
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    \$\begingroup\$ Well, it might work like a gate, but another important feature of gates is the ability to connect them to each other in a simple manner and have them work reliably. The circuit you suggest would be very difficult to cascade, similar to diode-resistor logic that requires transistors between stages to regenerate the signal. \$\endgroup\$ – alex.forencich Oct 1 '15 at 6:19

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