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I am using Vivado 15.2 on Linux with a Zynq FPGA. My design contains a single Integrated Logic Analyzer (ILA) core with some signals connected to it. Downloading works find and the hardware-manager loads the dashboard view as expected. The only problem, is that the Waveform window does not allow me to add any signals. The only thing it shows a is "No Content" message. In the Trigger-Setup window it is no problem to select the signals.
What do I need to change to see the signals in the Dashboard?enter image description here

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  • \$\begingroup\$ Did you see the ILA connected to the right signals using the FPGA editor? Or in the report files? What is your trigger conditions and your clock source? Are they OK and properly connected/defined? \$\endgroup\$ – FarhadA Oct 2 '15 at 12:24
  • \$\begingroup\$ Check the debug_nets.ltx (located inside the implementation directory, impl_2 in the case of your screen shot): this is a XML file that should specify all signals present in the ILA. If this is empty, something went wrong in defining the ILA. \$\endgroup\$ – rainer Oct 4 '15 at 16:42
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The problem has been solved by rebooting the machine and regenerating the bitfile. :-(

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