1
\$\begingroup\$

I am designing a hybrid power supply. The system is such that it will house an LDO and a switching regulator as well. The system has long intervals of sleep mode. Every now and then it wakes up and transmits/receives data. Its the transmission/reception times that a lot of current is drawn and the SMPS kicks in.

I intend to make use of a system whereby the current consumed is measured and the relevant supply is switched. One of the ways I can do that is using a current sensing resistor. The current is measured using an ADC and we turn on/off relevant MOSFETs that channel power from the LDO/regulator.

Now, my concern is about the MOSFETs. The MOSFETs need to be very high speed as the power source must be switched from LDO channel to switching regulator.

What is the average switching time for a MOSFET ? Also, can I speed up the switching time of a MOSFET by manipulating the gate voltage ? I understand that gate capacitance is an important parameter here. Is my plan of action of using MOSFETs for this a good approach ? Kindly advice.

\$\endgroup\$
  • 1
    \$\begingroup\$ Have you considered an SMPS that has a continous and a burst mode ? For high current it switches continously (same as what you propose) but when little current is needed it only switches on very infrequently, this saves a lot of power. There are SMPS ICs that have this feature. Combining 2 regulation loops and switching between them is complex. Too complex if you ask me. \$\endgroup\$ – Bimpelrekkie Oct 1 '15 at 15:36
  • \$\begingroup\$ the thing is I am using it for a space product and they have rad hard criterion. I am kindof implementing the same principle using an LDO and SMPS. \$\endgroup\$ – Board-Man Oct 1 '15 at 15:37
  • \$\begingroup\$ Hard criterion in the sense that it MUST use LDO part ? \$\endgroup\$ – Bimpelrekkie Oct 1 '15 at 15:40
  • 1
    \$\begingroup\$ No no. But I am unsure if there are rad hard equivalentsvfor smps with continuous and burst mode capability. \$\endgroup\$ – Board-Man Oct 1 '15 at 15:42
  • 1
    \$\begingroup\$ oh, rad = radiation ! You need a rediation hardened device. Aha, I misunderstood you there. Well then you have to look for such a device. \$\endgroup\$ – Bimpelrekkie Oct 1 '15 at 15:46
2
\$\begingroup\$

A MOSFET gate can be modeled as a capacitor. "Manipulating gate voltage" is not going to make it switch faster. Rearrange \$i(t)=C\dfrac{dV}{dt}\$ to \$t_r\approx \Delta t=\dfrac{C\Delta V}{I}\$. As you can see, to get rise time down, you need a MOSFET with low gate charge, and you need to push as much current into the gate as possible for a short period of time. This is usually done with careful selection of a MOSFET, and the use of a gate driver IC. This type of configuration easily yields sub-nanosecond rise times.

The reality is you probably don't need the MOSFETs to switch as fast as you think. With some capacitance on the common switched node, you can probably tolerate fairly long switching times, but it's impossible to say how long from the information given. Further, what is the point of the LDO when you have a SMPS that can supply the system? When it supplies the system, it's wasting power.

\$\endgroup\$
1
\$\begingroup\$

Instead of switching between LDO and SMPS there is a different solution. Just put them in parallel, outputs shorted BUT you set the LDO to a slightly higher output voltage.

For example: SMPS: 2.9 V, LDO: 3.0 V But you use an LDO that can only supply a low current, for example 10 mA.

When your load consumes 1 mA, the LDO will provide the current. The output voltage will be 3.0 V, from the LDO, the SMPS should switch off (I assume it will do this).

When your load consumes 100 mA the LDO cannot handle it, it will provide 10 mA but no more. The other 90 mA has to be provided by the SMPS. It will do this as soon as the output voltage will drop below 2.9 V. And it will since the LDO cannot keep it at 3.0 V anymore. Output voltage will be 2.9 V.

\$\endgroup\$
  • \$\begingroup\$ Not so straightforward. How can I ensure that even for 1mAmps its being sourced from the LDO ? Ofcourse current will travel via least resistance. SO the layout and track resistance will come into picture. Your point of shorting the outputs though makes sens and is the same I intend to do. Only that I will measure the current via an ADC and switch on/off the LDO/SMPS. When >100mAmps is needed, I will keep both of the m on for a short duration and after that I turn off the LDO. \$\endgroup\$ – Board-Man Oct 1 '15 at 15:56
  • \$\begingroup\$ "How can I ensure that even for 1mAmps its being sourced from the LDO ? "By setting the LDO to a slightly higher voltage ! If the LDO can supply tthe current (it must be less than 10 mA) it will supply the current and the voltage will be 3.0 V. Then the SMPS will switch OFF because it thinks: 3V, that's too high, I'll wait until it goes below 2.9 V. Layout and track resistance do not matter. \$\endgroup\$ – Bimpelrekkie Oct 1 '15 at 16:03

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.