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I am using a P chan fet as a high side switch. The data sheet specifies a min Vgs threshold voltage (-0.45V @ 250uA) and a max leakage current (Ids<1uA @ Vgs=0); but does not provide a cut off voltage. Is there a rule of thumb or equation I can use to estimate the cut off voltage? Note: The "cut off" voltage is the value of Vgs "below" which the channel is shut off and only leakage current flows. I just need to determine the Vgs required to guarantee the Ids is below some very small number. It is not practical to get Vgs=0V; so how close to 0V does it need to be?

Maybe cutoff is the wrong term? How can I determine a safe Vgs such that the sub-threshold Ids is small enough, say < 1-2uA?

The question is really about mosfets in general but here is the data sheet link: NTJD4158C Datasheet

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  • \$\begingroup\$ Um, which device exactly? And where's the datasheet link? \$\endgroup\$ – Adam Lawrence Oct 5 '15 at 19:53
  • \$\begingroup\$ Why would you need a bias resistor ? Please clarify in a schematic. No cut off voltage is provided because there is no cut off voltage. To switch the FET off, you just make Vgs = 0. I think you have to look at some example schematics on how to use a MOSFET, Google can find many for you. \$\endgroup\$ – Bimpelrekkie Oct 5 '15 at 20:02
  • \$\begingroup\$ You may be confused. The Ids<1uA at Vgs=0 says nothing about current in the gate circuit (Igs) which will be effectively 0. So why would Vgs be -0.1V? \$\endgroup\$ – Brian Drummond Oct 5 '15 at 21:34
  • \$\begingroup\$ I seem to have confused the issue by putting unnecessary details about my circuit. The question was about the relationship between Vgs (threshold) and Vgs (cutoff) of mosfets in general. Vgs cutoff being the Vgs below which the drain current is guaranteed to be below a given small value. Instead of bias resistor perhaps I should have said pull-up resistor. Leakage current thru the pull-up resistor on the gate determines my Vgs. Impossible to make it 0V so how small should I make it? But again it is not really relevant to the question. \$\endgroup\$ – PaulB Oct 6 '15 at 4:26
  • \$\begingroup\$ From the datasheet, you can't, except by keeping \$V_{gs}\$ at 0 V or higher (more positive). The threshold voltage is a minimum, which probably means minimum in magnitude, so the actual threshold voltage could be -0.40, -0.30, or anything really, but you know it will be below 0 V. If you need to have good cut-off behavior with a few 10's or 100 mV of negative \$V_{gs}\$ you probably need to look for a device with a higher threshold voltage magnitude. \$\endgroup\$ – The Photon Oct 6 '15 at 20:25
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I am really over my head with all of the semiconductor terms and math but here goes. I have found several references that state that sub-threshold Ids drops by a factor of 10 for every n*60mV drop in Vgs below V threshold. Where "n" is a characteristic of the FET: n = 1 + Cb/Cg ; Cb is bulk capacitance, Cg is gate capacitance
I have not yet found a rule of thumb for maximum "n" but it seems that maybe; 1.0 < n < 1.4

Rule of Thumb: Perhaps I could assume that for every 100mV below the threshold voltage, Ids will decrease by 10x. So if the data sheet specifies (Vth = -0.45, Ids=-250uA) If I get |Vgs| < |-0.21| then |Ids| < |-1uA|

MIT Lecture Slides

Berkeley Lecture Slides

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