# Simple NMOS transistor circuit output impedance

I am having trouble figuring out the best way to determine the output impedance of this simple NMOS transistor circuit:

Both transistors are equal, and the body effect is ignored.

What method should I use to find the output impedance? Should I find the transistors' small-signal equivalent and then use Thevenin and simply add resistances of both transistors together, or is there another method I could use?

Also, won't the output impedance vary with the drain current? Will it then be a function of $V_{\text{ref}}$?

EDIT:

I have tried to reduce the circuit down to its small signal equivalent using the t-model for an active NMOS. Is this correct?

EDIT 2:

Can the small signal equivalent circuit be reduced using Thevenin into something like this?

I feel like I am missing something here. It just seems too easy to be true.

• Use the small signal equivalent, apply a test voltage to the drain of $Q_1$, and measure the current from that test voltage (or, equivalently, apply a test current and measure its voltage). – Null Oct 6 '15 at 13:38
• Output impedance is a small signal effect so yes, you will need to use the ss-equivalent. The ss-equivalent circuit will not change but the values of the components will change depending on large-signal parameters. So yes drain current and Vref will have an impact. But first make the ss-equivalent and then see what changes when Ids changes etc. – Bimpelrekkie Oct 6 '15 at 13:50
• @Null: I have attempted to find the ss-equivalent of the circuit. Is this correct? – OKHS Oct 6 '15 at 15:01
• It looks largely correct. The only thing I see wrong is that $V_{\text{ref}}$ is a DC bias voltage, so it is a small signal ground. +1 for the effort, by the way. – Null Oct 6 '15 at 15:14
• @Null: Cheers. I have made an attempt to use Thevenin to find the output resistance, but I might be missing something... – OKHS Oct 6 '15 at 15:29

So I spent some time researching the problem, and I came up with a possible solution:

First we draw the small signal equivalent for the circuit and add a test voltage $v_{\text{d}}$:

I have made the assumption that $r_{\text{ds1}}$ = $r_{\text{ds1}}$ = $r_{\text{ds}}$ because the transistors are identical.

We find expressions for $i_{\text{d}}$ in the top part:

And for $i_{\text{d}}$ in the lower part:

We seperate out $v_{\text{s}}$

And insert it into the first expression for $i_{\text{d}}$:

We then solve for $R_{\text{s}}$:

Which is the output impedance.

If anyone could verify if the answer above is correct or incorrect, that would be great.

The answer given by @OKHS seems to be correct with the given assumptions. Just for the sake of completeness, please note that when there is a resistance $\mathrm{R_s}$ seen at the course of an NMOS transistor, the output impedance is (at low frequencies)

$$\mathrm{R_{out}=R_s+r_{ds}+g_m r_{ds} R_s}$$

The derivation is really a simple exercise of KVL-KCL. Now the impedance of a diode-connected NMOS Q2 is just $\mathrm{R_s = \frac{1}{g_{m2}} \parallel \frac{1}{r_{ds2}}}$ (another simple exercise). So the total impedance seen looking into the drain of Q1 can be easily calculated.

Now, for all practical purposes and if the transistors are sized and biased correctly, the output impedance equation can be simplified to $$\mathrm{R_{out} \approx r_{ds}+g_m r_{ds} R_s = r_{ds}\left(1 + g_m R_s\right)}$$

and also when $\mathrm{1/g_m}$ is parallel with $\mathrm{r_{ds}}$, we often just consider $\mathrm{1/g_m}$.

So the output impedance for your example can be approximated by $$\mathrm{R_{out}=r_{ds1}\left(1 + \frac{g_{m1}}{g_{m2}}\right)}$$ which is $\mathrm{2r_{ds1}}$ if $\mathrm{g_{m1}=g_{m2}}$