I was testing a four-layer PCB and got electric shocks several times when trying to touch the edges of the PCB. The four layers are: top/+15V/ground/bottom layer.
It seems that there are several "white spots" on the edges. And is it possible that the +15 layer get exposed and shocked me? If that is the case, it is quite dangerous.
We manufactured big boards that each one combines several small ones. Then we break each big boards to have small boards which are the final product. So I guess the power layer(+15V) may get exposed at the breaking process. My questions are:
Am I correct?
Is it because we combining small boards into big boards in the wrong way, such that the internal layers get exposed easily?
Is it because our prototype factory did not do a good job?
What are the potential risks under this condition? To the product its self and to users?
Every answer below is great. I chose Olin's because his answer contains most details.