3
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I have a module declared as:

module bin2BCD(
    input [11:0] bin12_in],
    output reg [3:0] thousands,
    output reg [3:0] hundreds,
    output reg [3:0] tens,
    output reg [3:0] ones,
);

I have another module which generates a 10 bit binary output (call it M) whose maximum value is 861 base 10.

Because of this, I would like instantiate this module with the first two bits of bin12_in set to 0, followed by the binary value of M (to make 12 bits).

How can I pass a 10 bit value to a module that needs a 12 bit input?

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4
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In this case, you want to concatenate two zero bits to the beginning of your 10 bit word to create a 12 bit word.

You can do this with the verilog concatenation operator {,} like this:

bin2BCD instance_name (
   .bin12_in({2'b00, M}),
   .thousands(digit3),
   .hundreds(digit2),
   .tens(digit1),
   .ones(digit0)
);
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  • \$\begingroup\$ @B Pete I see that you use a different format for input/output (dot) - is this one preferred over the one in the question? \$\endgroup\$ – SunnyBoyNY Oct 8 '15 at 3:26
  • 3
    \$\begingroup\$ @SunnyBoyNY The code snippet in the question is from a module definition. The code snippet in the answer is an instantiation of the module. Module definitions and instantiations have different syntax. As far as instantiation syntax goes, I prefer the named port syntax I used above to the positional port syntax... but that's a matter of preference and style, not functionality. \$\endgroup\$ – B Pete Oct 8 '15 at 3:48
  • \$\begingroup\$ That raises another question ... using the named syntax as in your answer, if I don't need the thousands place, can I just not instantiate(don't know the right term) that port? \$\endgroup\$ – Daniel B. Oct 9 '15 at 4:11
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    \$\begingroup\$ @DanielB. Interesting question... an unused port may be left off of the port list, or may be left on the list with the parentheses left empty to indicate that the port is left unconnected. I usually leave the port off the list entirely. But, a source I found during the search I just did to verify this information suggested that it was better style to use the empty parentheses for code clarity, to indicate that the port is unconnected on purpose, and was not left out by mistake. I do see some merit tn that suggestion. \$\endgroup\$ – B Pete Oct 9 '15 at 4:40
  • \$\begingroup\$ As an aside, the source I mentioned in the comment above also advises using named association rather than position association to prevent any problems caused by specifying ports in the wrong order. \$\endgroup\$ – B Pete Oct 9 '15 at 4:42

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