If we have generic memory component that is \$2^{16}\times8 = 524288\$ Bits wide and CPU that that has address bus that is \$17\$ Bits wide. How could I locate this memory to begin from address \$ 10000 \$ (hexadecimal "Hex") and what is the corresponding end address? Could somebody provide hints or tips?

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    \$\begingroup\$ That doesn't really make sense. your memory component has 65536 8 bit addresses in the range 0-FFFF (hex) your address 10000 is outside this range, there is no 'end' address given or implied. Bits are not usually individually addressable. \$\endgroup\$ – Icy Oct 8 '15 at 15:34

The important number isn't 524288, it's \$2^{16}\$ 65536, or hex 10000.

An m x 8 memory will return 8 bits when it gets a m-bit wide memory address. So your 16-bit wide address bus memory chip will be able to provide the contents of all of its memory locations using only 16 address bus signals.

That memory's 16-bit address range would normally be 0 to 65535, or hex FFFF.

So adding hex 10000 to 0, should be very easy, and adding hex 10000 to FFFF should be easy too if you understand how binary addition works.

The processor's address bus width effects the calculation, because the address bus is the only way to give the memory an address. There is no magic.

Yes, adding hex numbers (or an underlying binary representation) is interpreted as adding, the difference is binary is a very simple operation. We often convert hex numbers to binary to do the addition, then convert the binary back to hex, to make it easier to read and write.

You are adding using a compact form of binary (hex).
When the non-zero digits being added are in different 'column' positions, it is straightforward, because there is no carry.
As a concrete example, 15 (hex F), plus 16 (hex 10), is hex 1F.

hex 10000 is binary 1_0000_0000_0000_0000
hex FFFF os binary 1111_1111_1111_1111
I'll leave this addition for you to do.

This still leaves open the question about how to map the 0-FFFF address range of the memory into the 10000-1FFFF address range (that you ask for).

So, if we think about using two of the \$2^{16}\$ memory chips, to create a memory with a capacity, and address range, of \$2^{17}\$, then we could make one chip active for reading/writing when the address bus carries hex 0-FFFF, and the other chip (the one you want) active with address range 10000-1FFFF.

A generic memory chip will have some sort of chip select signals. The design assumption is multiple chips could be combined to create a memory system with a much larger capacity, and hence address range, than one memory chip. This makes a lot of sense, for CPU and memory manufacturers. The CPU can have a memory subsystem bigger than one memory chip, and the memory manufacturers can sell lots of the same chip.

The chip select might be a single signal, or it might be several. For simplicity, lets assume the chip select is a single input signal to the memory. The memory system designer will define, using boolean expressions, combinations of memory address bus signals to select one of the memory chips.

So, you need to figure out how to use the 17 memory address bits to switch your memory chip 'on'. The thing to recognise is, there can be only 1 unused signal, because the chip will use 16 memory address bits directly (internally) to select the specific 8-bit value.

So, you need a boolean expression which will use the remaining memory address bits (only the 17th bit), so that it 'activates' your memory chip for the right address range. Every address that the memory chip must respond to has the 17th address bit set to 1.

The only minor extra complication might come from the value that the chip select needs in order to 'activate' the memory chip. If chip select makes the chip active with a one (1), there is nothing more to do, the boolean expression is = the state of Address bus signal 17 (numbering from 1, or 16 numbering the signals from 0). However, it is common for the chip select to 'activaye' the chip when it is low (0), in which case the state of the address bit must be inverted.

(Side Note. The address-bus is just 17 seperate signals, where each signal is a single 'wire', so the bus is 17 wires carrying binary signals, combined together, they can represent all permutation of 0 and 1 across 17 wires, i.e. 1_0000_0000_0000_0000 to 1_1111_1111_1111_1111)

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  • \$\begingroup\$ hmmmm how does the processors address bus width affect the calculations? I get that \$ 2^{16}\$ is in hex 10000 and also hex FFFF. By adding do you mean construct a new hexadecimal (base16) number that represents beginning \$65536+0\$ and the ending hex 10000 + FFFF =\$65536+65536\$? \$\endgroup\$ – ELEC Oct 8 '15 at 15:50
  • \$\begingroup\$ @ELEC hex 10000+FFFF=65536+65535. \$\endgroup\$ – Tom Carpenter Oct 8 '15 at 16:00
  • \$\begingroup\$ I calculated with old pen and paper and got begin address to be hex 10000 (hex 10000 + 0) and end address to be 1FFFF (hex 10000 + FFFF)? Is this correct? \$\endgroup\$ – ELEC Oct 8 '15 at 16:19
  • \$\begingroup\$ @ELEC - yes, you've got it. and 1FFFF is the largest value that 17 bits can represent. \$\endgroup\$ – gbulmer Oct 8 '15 at 16:21

I think this is really an address decoding question.

You want to map the memory to occupy the upper half of the 17 bit processor address space (A weird processor, but anyway) (10000 - 1ffff). This is probably most easily done by gating the chip select signal with A16 (Which if you think about it will only be high for addresses in the upper half of the address space).

Regards, Dan.

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